The Invariance of the Noise Impedance in n-MOSFETs across Technology Nodes and its Application to the Algorithmic Design of Tuned Low Noise Amplifiers
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[1] Trung-Kien Nguyen,et al. CMOS low-noise amplifier design optimization techniques , 2004, IEEE Transactions on Microwave Theory and Techniques.
[2] A. Siligaris,et al. High-Frequency and Noise Performances of 65-nm MOSFET at Liquid Nitrogen Temperature , 2006, IEEE Transactions on Electron Devices.
[3] Pietro Andreani,et al. Noise optimization of an inductively degenerated CMOS low noise amplifier , 2001 .
[4] Peter Russer,et al. An efficient method for computer aided noise analysis of linear amplifier networks , 1976 .
[5] J. L. Showell,et al. A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design , 1997 .
[6] Sorin P. Voinigescu,et al. A scalable high frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design , 1996, Proceedings of the 1996 BIPOLAR/BiCMOS Circuits and Technology Meeting.
[7] M.T. Yang,et al. 60-GHz PA and LNA in 90-nm RF-CMOS , 2006, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.
[8] S.P. Voinigescu,et al. The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks , 2006, IEEE Journal of Solid-State Circuits.
[9] T.H. Lee,et al. A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.