Analysis of submodule capacitor overvoltage during DC-side fault in hybrid MMC-based HVDC system

The hybrid modular multilevel converter (MMC) consisting of half-bridge submodules (HBSMs) and full-bridge submodules (FBSMs) is one of the promising converter topologies for HVDC system, due to its fault blocking capability without applying circuit breakers and relatively lower cost compared with FBSM-MMC. However, the energy stored in the lines will cause an overvoltage in the capacitor voltages of the FBSMs. This overvoltage is significant especially when the HVDC system contains long distance transmission lines. The capacitor overvoltage can threat the safe operation of the system and the lifetime of the components, and therefore shall be appropriately regulated. This work analyzes the DC fault current blocking process of a hybrid MMC based HVDC system, determines the major factors which influence the capacitor overvoltage, and proposes corresponding mitigation measures. The simulation results of a two-terminal HVDC system on PSCAD/EMTDC with various test conditions are presented to validate the proposed analysis.