Impact of Loop Unrolling on Area, Throughput and Clock Frequency for Window Operations Based on a Data Schedule Method

Window operations which are computationally intensive and data intensive are frequently used in image compression, pattern recognition and digital signal processing. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these algorithms. This paper studies the effect of loop unrolling on the area, clock speed and throughput based on a data schedule method to find the latent connections between the three capabilities and loop unrolling. Our results indicate that due to the unique design of the compilation framework. Inner loop unrolling makes the controllers become more complicated than outer loop unrolling and increase the requirement of areas at the same time. However, outer loop unrolling demands more memory elements to keep the reused data. The clock speed begins to decrease when the number of RAM modules extends to a certain size, and the throughput increase in different degrees for different operations.

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