论文信息 - A 0.41µA standby leakage 32Kb embedded SRAM with Low-Voltage resume-standby utilizing all digital current comparator in 28nm HKMG CMOS

A 0.41µA standby leakage 32Kb embedded SRAM with Low-Voltage resume-standby utilizing all digital current comparator in 28nm HKMG CMOS

A high-performance and low-leakage current embedded SRAM for mobile phones is proposed. The proposed SRAM has a low-voltage resume-standby mode to reduce the standby leakage. An all digital current comparator is also proposed to choose a suitable standby mode. A test chip was fabricated using 28 nm HKMG CMOS technology. The proposed 32 Kb SRAM achives 0.41 μA standby leakage which is half of the conventional value, with 420 ps access.

Yasuhisa Shimazaki | Noriaki Maeda | Shigenobu Komatsu | Masao Morimoto

[1] N. Maeda,et al. A 300MHz 25/spl mu/A/Mb leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[2] A. Inoue,et al. Time-to-digital converter with vernier delay mismatch compensation for high resolution on-die clock jitter measurement , 2008, 2008 IEEE Symposium on VLSI Circuits.

[3] Y. Yasu,et al. A resume-standby application processor for 3G cellular phones , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[4] Manoj Sachdev,et al. Impact of gate induced drain leakage on overall leakage of submicrometer CMOS VLSI circuits , 2002 .

[5] Kenji Hirose,et al. A 390MHz Single-Chip Application and Dual-Mode Baseband Processor in 90nm Triple-Vt CMOS , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[6] S. Shimada,et al. A 300-MHz 25-/spl mu/A/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor , 2004, IEEE Journal of Solid-State Circuits.