In this letter, an in-pixel chopping technique to reduce the low-frequency or 1/<inline-formula> <tex-math notation="LaTeX">${f}$ </tex-math></inline-formula> noise of the source follower (SF) transistor in an active pixel sensor (APS) is presented. The SF low-frequency noise is modulated at higher frequencies through chopping, implemented inside the pixel, and in later stage eliminated using low-pass filtering. To implement the chopping, the conventional 3T APS architecture is modified, with only one additional transistor of minimum size per pixel. Reduction in the noise also enhances the dynamic range of the image sensor. The prototype sensor, consists of a <inline-formula> <tex-math notation="LaTeX">$ {128} {\times } {128}$ </tex-math></inline-formula> sized pixel array with in-pixel chopping and column-level read-out circuit, is fabricated in AMS 0.35-<inline-formula> <tex-math notation="LaTeX">$ {\mu }\text{m}$ </tex-math></inline-formula> CMOS OPTO process. The pixel is laid out at the pitch of 10.5 <inline-formula> <tex-math notation="LaTeX">$ {\mu }\text{m}$ </tex-math></inline-formula> with a fill-factor of 30%. To validate the proposed technique a <inline-formula> <tex-math notation="LaTeX">$ {2} {\times } {2}$ </tex-math></inline-formula> pixel array is characterized. The output noise integrated in the frequency band from 1 Hz to 20 kHz is measured as 210 <inline-formula> <tex-math notation="LaTeX">$ {\mu }\text{V}_{\textrm {RMS}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$191~ {\mu }\text{V}_{\textrm {RMS}}$ </tex-math></inline-formula> at chopping frequency (<inline-formula> <tex-math notation="LaTeX">$ {f}_{\textrm {ch}}$ </tex-math></inline-formula>) of 4 MHz and 8 MHz, respectively, which shows a reduction in the noise power by 13.3 and 14.2 dB, respectively.
[1]
E. Vittoz,et al.
A CMOS Chopper Amplifier
,
1986,
ESSCIRC '86: Twelfth European Solid-State Circuits Conference.
[2]
Y. Nemirovsky,et al.
1/ f noise reduction of metal‐oxide‐semiconductor transistors by cycling from inversion to accumulation
,
1991
.
[3]
Yannis Tsividis,et al.
Integrated continuous-time filter design
,
1993,
Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.
[4]
Yannis Tsividis,et al.
Integrated continuous-time filter design - an overview
,
1994,
IEEE J. Solid State Circuits.
[5]
Eric A. M. Klumperink,et al.
Low-Frequency Noise Phenomena in Switched MOSFETs
,
2007,
IEEE Journal of Solid-State Circuits.
[6]
Peter Seitz,et al.
A sub-electron readout noise CMOS image sensor with pixel-level open-loop voltage amplification
,
2011,
2011 IEEE International Solid-State Circuits Conference.
[7]
Yue Chen,et al.
A 0.7e−rms-temporal-readout-noise CMOS image sensor for low-light-level imaging
,
2012,
2012 IEEE International Solid-State Circuits Conference.
[8]
C. Enz,et al.
Temporal Readout Noise Analysis and Reduction Techniques for Low-Light CMOS Image Sensors
,
2016,
IEEE Transactions on Electron Devices.
[9]
M. Sarkar,et al.
Analysis and Validation of Low-Frequency Noise Reduction in MOSFET Circuits Using Variable Duty Cycle Switched Biasing
,
2017,
IEEE Journal of the Electron Devices Society.