A Low-Power High-Input-Impedance 70-dB Gain ECG Readout System with High Interference Tolerance

This paper presents a low-power high-input-impedance electrocardiogram (ECG) readout system for recording from high-impedance electrodes. To minimize power, the system employs large amplification to minimize the required resolution of the analog-to-digital converter (ADC)-with a gain of 70 dB, only 7-bit ADC is required to not degrade the overall signal-to-noise ratio. Such a high gain is made feasible by a discrete-time signal-folding amplifier and an interference suppression circuit (ISC). Fabricated in a $0.18-\mu \mathrm{m}$ CMOS process and operating from a 1.2-V supply, the system achieves an input-referred noise of 2.9 $\mu \mathrm{V}_{\mathrm{rms}}$, while consuming 7.1 $\mu \mathrm{W}$ of power. With the ISC enabled for strong interference cases, the system can tolerate upto 100 $\mathrm{mV}_{\mathrm{pp}}$ of interference while consuming 13.1 $\mu \mathrm{W}$ of power.

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