Oscillator verification with probability one

This paper presents the formal verification of startup for a differential ring-oscillator circuit used in industrial designs. Dynamical systems theory shows that any oscillator must have a non-empty failure; however, it is possible to show that these failures only occur with zero probability. To do so, this paper generalizes the “cone argument” initially presented in [1] and proves the soundness of this generalization. This paper also shows how concepts from analog design such as differential operation can be soundly incorporated into the verification to produce simpler models and reduce the complexity of the verification task.

[1]  Mark R. Greenstreet,et al.  Faster projection based methods for circuit level verification , 2008, 2008 Asia and South Pacific Design Automation Conference.

[2]  Ian M. Mitchell,et al.  Proving Newtonian arbiters Correct, almost surely , 1996 .

[3]  Stephen P. Boyd,et al.  Convex Optimization , 2004, Algorithms and Theory of Computation Handbook.

[4]  Martin Fränzle,et al.  HySAT: An efficient proof engine for bounded model checking of hybrid systems , 2007, Formal Methods Syst. Des..

[5]  Lars Hedrich,et al.  Model checking algorithms for analog verification , 2002, DAC '02.

[6]  Suwen Yang,et al.  Verifying start-up conditions for a ring oscillator , 2008, GLSVLSI '08.

[7]  B. Krogh,et al.  Towards formal verification of analog designs , 2004, ICCAD 2004.

[8]  Alexandre Yakovlev,et al.  Measuring Deep Metastability and Its Effect on Synchronizer Performance , 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[9]  Matthias Althoff,et al.  Formal verification of phase-locked loops using reachability analysis and continuization , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[10]  T. Henzinger,et al.  Algorithmic Analysis of Nonlinear Hybrid Systems , 1998, CAV.

[11]  Charles E. Molnar,et al.  Anomalous Behavior of Synchronizer and Arbiter Circuits , 1973, IEEE Transactions on Computers.

[12]  Siegfried M. Rump,et al.  INTLAB - INTerval LABoratory , 1998, SCAN.

[13]  Seth R. Sanders,et al.  Architecture and IC implementation of a digital VRM controller , 2003 .

[14]  Scott Little,et al.  Modeling and Simulation Aided Verification of Analog / Mixed-Signal Circuits ? , 2008 .

[15]  Goran Frehse PHAVer: Algorithmic Verification of Hybrid Systems Past HyTech , 2005, HSCC.

[16]  Lars Hedrich,et al.  State Space Exploration of Analog Circuits by Visualized Multi-Parallel Particle Simulation , 2009, 2009 International Conference on Signal Processing Systems.

[17]  M. Hirsch,et al.  Differential Equations, Dynamical Systems, and Linear Algebra , 1974 .

[18]  Rob A. Rutenbar,et al.  Verifying analog oscillator circuits using forward/backward abstraction refinement , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[19]  Joel R. Phillips,et al.  First steps towards SAT-based formal analog verification , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

[20]  D. Pollard A User's Guide to Measure Theoretic Probability by David Pollard , 2001 .

[21]  Chris J. Myers,et al.  Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.