Injection Level Flow Control for Networks-on-Chip (NoC)

It is observed that NoC may saturate at certain rate of injecting packets, causing significant network performance degradation. The source node therefore should be notified about the network traffic condition to control its rate of injecting packets into the network accordingly. In this paper, we present a novel flow control strategy suitable for any routing algorithm by exploring the congestion status from a new viewpoint of share pattern. The proposed strategy is based on the concept of injection level, aiming at regulating the sending packet rates using several injection levels according to network status. A simple method is presented to obtain the network status. Implementing the strategy need not change the router design. Performance evaluation has been conducted based on flit-accurate and open source SystemC simulator. The results show that, using the proposed method, the NoC could run smoothly to avoid saturation problem. The average packet delay is dropped to the ideal level without hurting the throughput. A balance has been achieved between packet latency and network throughput. The energy consumption is also reduced since the proposed strategy significantly decreases the network payload.

[1]  Théodore Marescaux,et al.  Distributed Congestion Control for Packet Switched Networks on Chip , 2005, PARCO.

[2]  Radu Marculescu,et al.  Application-specific buffer space allocation for networks-on-chip router design , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[3]  Kang G. Shin,et al.  Impact of selection functions on routing algorithm performance in multicomputer networks , 1997, ICS '97.

[4]  Radu Marculescu,et al.  DyAD - smart routing for networks-on-chip , 2004, Proceedings. 41st Design Automation Conference, 2004..

[5]  William J. Dally,et al.  The torus routing chip , 2005, Distributed Computing.

[6]  Ge-Ming Chiu,et al.  The Odd-Even Turn Model for Adaptive Routing , 2000, IEEE Trans. Parallel Distributed Syst..

[7]  Tughrul Arslan,et al.  Wormhole Routing with Virtual Channels using Adaptive Rate Control for Network-on-Chip (NoC) , 2006, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06).

[8]  Axel Jantsch,et al.  Networks on chip , 2003 .

[9]  Loren Schwiebert,et al.  Performance Tuning of Adaptive Wormhole Routing through Selection Function Choice , 2002, J. Parallel Distributed Comput..

[10]  William J. Dally,et al.  Flit-reservation flow control , 2000, Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550).

[11]  Radu Marculescu,et al.  Application-specific buffer space allocation for networks-on-chip router design , 2004, ICCAD 2004.

[12]  An-Yeu Wu,et al.  Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency , 2007, 2007 IEEE Workshop on Signal Processing Systems.

[13]  Radu Marculescu,et al.  Prediction-based flow control for network-on-chip traffic , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[14]  W. Dally,et al.  Route packets, not wires: on-chip interconnection networks , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[15]  Pedro López,et al.  On the Influence of the Selection Function on the Performance of Networks of Workstations , 2000, ISHPC.

[16]  Vincenzo Catania,et al.  Implementation and Analysis of a New Selection Strategy for Adaptive Routing in Networks-on-Chip , 2008, IEEE Transactions on Computers.

[17]  Diederik Verkest,et al.  Centralized end-to-end flow control in a best-effort network-on-chip , 2005, EMSOFT.