Settling time analysis of third order systems

Several operational transconductance amplifiers often have a third order transfer function. The use of these amplifiers for several applications, such as in switched-capacitor circuits requires the minimization of the settling time to a step response. This problem is studied in this work. First, the closed loop transfer function of a system with an the open loop 3/sup rd/ order transfer function is obtained, and a mapping from the closed loop parameters to the open loop parameters is derived. Second, the closed loop step response is deduced. Third, the dynamic settling error is studied based on numerical simulations. The described procedure can be used to find the optimal location for the open loop poles and zeros that minimizes the settling time for a specific amplifier structure.