High Performance BICS Design for IDDQ Testing Application

Quiescent supply current (IDDQ) testing is a useful test method for CMOS circuit and can be combined with functional testing to reduce total test time and increase reliability. This paper designed a high-performance built-in current sensor (HP-BICS) for Iddq testing applications. The proposed HP-BICS can attain small detection time and low power dissipation for ensuring the reliability and reducing the impact of the circuit under test (CUT) during testing. Simulation results show that the proposed HP-BICS has a much performance improvement compared with the previous works.

[1]  Yiorgos Tsiatouhas,et al.  A compact built-in current sensor for I/sub DDQ/ testing , 2000, Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646).

[2]  Jeong Beom Kim,et al.  A current sensing circuit for IDDQ testing , 2005, 2005 6th International Conference on ASIC.

[3]  Tomoo Inoue,et al.  Test generation for acyclic sequential circuits with single stuck-at fault combinational ATPG , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[4]  Yiorgos Tsiatouhas,et al.  A Compact Built-In Current Sensor for IDDQ Testing , 2000 .

[5]  Houjun Wang,et al.  IDDQ test generation for BF fault in combinational circuit based on genetic algorithms , 2005, Proceedings. 2005 International Conference on Communications, Circuits and Systems, 2005..

[6]  Bin Xue,et al.  Built-in current sensor for IDDQ test , 2004, Proceedings. 2004 IEEE International Workshop on Current and Defect Based Testing (IEEE Cat. No.04EX1004).

[7]  Fabrizio Lombardi,et al.  Analysis and measurement of fault coverage in a combined ATE and BIST environment , 2004, IEEE Transactions on Instrumentation and Measurement.

[8]  Jeong Beom Kim,et al.  Design of a built-in current sensor for I/sub DDQ/ testing , 1998 .