EMC-Y: parallel processing element optimizing communication and computation
暂无分享,去创建一个
Mitsuhisa Sato | Shuichi Sakai | Yuetsu Kodama | Yoshinori Yamaguchi | Yasuhito Koumura | Hirohumi Sakane | S. Sakai | Y. Yamaguchi | H. Sakane | M. Sato | Yuetsu Kodama | Yasuhito Koumura
[1] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .
[2] Toshitsugu Yuba,et al. An Architecture Of A Dataflow Single Chip Processor , 1989, The 16th Annual International Symposium on Computer Architecture.
[3] Shuichi Sakai,et al. Load balancing by function distribution on the EM-4 prototype , 1991, Proceedings of the 1991 ACM/IEEE Conference on Supercomputing (Supercomputing '91).
[4] Shuichi Sakai,et al. A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation , 1992, Future Gener. Comput. Syst..
[5] Kenji Nishida,et al. A hardware design of the SIGMA-1, a data flow computer for scientific computations , 1986 .
[6] T. Yuba,et al. An architecture of a dataflow single chip processor , 1989, ISCA '89.
[7] Anoop Gupta,et al. The DASH prototype: implementation and performance , 1992, ISCA '92.
[8] Shuichi Sakai,et al. Design and Implementation of a Circular Omega Network in the EM-4 , 1993, Parallel Comput..
[9] Andrew A. Chien,et al. J-machine: A fine-grain concurrent computer , 1989 .
[10] David E. Culler,et al. Fine-grain parallelism with minimal hardware support: a compiler-controlled threaded abstract machine , 1991, ASPLOS IV.
[11] Arvind,et al. Executing a Program on the MIT Tagged-Token Dataflow Architecture , 1990, IEEE Trans. Computers.
[12] Anant Agarwal,et al. APRIL: a processor architecture for multiprocessing , 1990, ISCA '90.