Design and realization of a 13-bit serial to parallel GaAs digital circuit for 6–18 GHz T/R module

In this paper, a 13-bit serial to parallel GaAs digital circuit based on GaAs 0.15um Enhancement-Depletion(ED) PHEMT has been realized and measured. This serial to parallel circuit is designed for the 6-18 GHz T/R module, it controls 1-bit switch, 6-bit shifter and 6-bit attenuator. This GaAs logic circuit could reduce the size of T/R module chip and improve the integration degree of the system. The simulated and measured data on some basic logic cells (NOR logic gate, levelshifter) is shown in the paper. We also tested a 6-bit serial to parallel logic testcell. The 13-bit serial to parallel logic circuit work successfully in the whole T/R module.

[1]  Omar Wing.  Gallium Arsenide Digital Circuits , 1990 .

[2]  M. Tsunotani,et al.  A 390ps 1000-gate array using GaAs super-buffer FET logic , 1985, 1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[3]  M. Priolo,et al.  Advanced MMIC T/R module for 6 to 18 GHz multifunction arrays , 1992, IEEE 1992 Microwave and Millimeter-Wave Monolithic Circuits Symposium Digest of Papers.

[4]  Walter Ciccognani,et al.  Design and Realization of GaAs Digital Circuit for Mixed-Signal MMIC Implementation in AESA Applications , 2011 .

[5]  P.M. Asbeck,et al.  High speed GaAs integrated circuits , 1982, Proceedings of the IEEE.

[6]  Hao Jingchen,et al.  Direct Coupled FET Logic (DCFL) circuit for GaAs LSIC application , 1998, ICMMT'98. 1998 International Conference on Microwave and Millimeter Wave Technology. Proceedings (Cat. No.98EX106).