Abstraction Techniques for Modeling Real-World Interface Chips

We describe techniques for specifying the requirements of real-world interface chips, using as a test target a processor interface unit (PIU). The PIU modeling problem is explained, and current interpreter specification practices are shown to be inadequate for the PIU requirements. General modeling techniques for handling difficult aspects of the PIU are explained, and a new approach that implements these techniques is presented and applied to the PIU requirements specification.