32.4 A 0.4-to-1.2V 0.0057mm2 55fs-Transient-FoM Ring-Amplifier-Based Low-Dropout Regulator with Replica-Based PSR Enhancement

Digital low-dropout regulators (DLDOs) are commonly used in low-power system-on-chips (SoCs) because of their low-voltage operation and fast transient response via the digital control of a power gate. However, the digital control of the power gate results in an output voltage ripple and a decrease in the power-supply rejection (PSR). In addition, the transient performance of DLDOs depends strongly on the operating clock frequency. Several techniques such as event-driven operation [1], VCO-embedded time-based control [2], and computed regulation [3] have been proposed to reduce the dependency on the operating clock frequency. Nonetheless, the output voltage ripple and PSR degradation of DLDOs still need to be addressed. Although an inverter-based analog LDO [4] that provides a low-voltage operation and a wide-band PSR has been proposed, as compared to DLDOs it has a slow transient response and narrow input voltage range.

[1]  Shi-Jie Wen,et al.  A fully integrated 40pF output capacitor beat-frequency-quantizer-based digital LDO with built-in adaptive sampling and active voltage positioning , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

[2]  Wenbing Zhang,et al.  14.5 A 0.6-to-1.1V Computationally Regulated Digital LDO with 2.79-Cycle Mean Settling Time and Autonomous Runtime Gain Tracking in 65nm CMOS , 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

[3]  Kazuki Sobue,et al.  Ring Amplifiers for Switched Capacitor Circuits , 2012, IEEE Journal of Solid-State Circuits.

[4]  Mingoo Seok,et al.  20.6 A 0.5V-VIN 1.44mA-class event-driven digital LDO with a fully integrated 100pF output capacitor , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).