An experimental study of the state-of-the-art PUFs implemented on FPGAs

Authentication and cryptographic key generation mechanisms are used in a broad range of security related applications. While there have been substantial efforts among the security research community, challenges in implementation methods for authentication and cryptographic key generation still prevail. With inherent irreplicability, Physical Unclonable Functions (PUFs) provide a new solution to security challenges. However, designing a new PUF or finding an appropriate existing PUF for each new security application is not an easy task, and it requires a set of particular properties to suite particular application. Thus, a thorough experimental study of numerous PUFs can provide useful information on different properties of these PUFs. Moreover, PUF development researchers can utilize the study results to design new PUFs with enhanced properties or to overcome deficiencies of existing PUFs. This paper is an effort to implement a group of state-of-the-art PUFs on two models of FPGAs and also to carry out an experimental analysis that evaluates the implemented PUFs. Our study focused on two major classes of PUFs: path-delay-based PUFs and frequency-variation-based PUFs with three designs in each of two classes. The experimental results provide useful information for security application developers to devise innovative PUF-utilized security applications as well as PUF design researchers to design PUFs for particular applications.

[1]  Kris Gaj,et al.  A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs , 2011, 2011 14th Euromicro Conference on Digital System Design.

[2]  Patrick Schaumont,et al.  An Analysis of Delay Based PUF Implementations on FPGA , 2010, ARC.

[3]  Máire O'Neill,et al.  Ultra-compact and robust FPGA-based PUF identification generator , 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

[4]  Marten van Dijk,et al.  A technique to build a secret key in integrated circuits for identification and authentication applications , 2004, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525).

[5]  Stephen A. Benton,et al.  Physical one-way functions , 2001 .

[6]  G. Edward Suh,et al.  Physical Unclonable Functions for Device Authentication and Secret Key Generation , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[7]  Kazukuni Kobara,et al.  Evaluation of Physical Unclonable Functions for 28-nm Process Field-Programmable Gate Arrays , 2014, J. Inf. Process..

[8]  Mitsugu Iwamoto,et al.  A New Arbiter PUF for Enhancing Unpredictability on FPGA , 2015, TheScientificWorldJournal.

[9]  Akashi Satoh,et al.  Quantitative and Statistical Performance Evaluation of Arbiter Physical Unclonable Functions on FPGAs , 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.

[10]  Patrick Schaumont,et al.  Improving the quality of a Physical Unclonable Function using configurable Ring Oscillators , 2009, 2009 International Conference on Field Programmable Logic and Applications.

[11]  T.Tanamoto Physically Unclonable Function using Initial Waveform of Ring Oscillators on 65nm CMOS Technology , 2016 .

[12]  Qiang Zhou,et al.  Techniques for Design and Implementation of an FPGA-Specific Physical Unclonable Function , 2016, Journal of Computer Science and Technology.

[13]  Patrick Schaumont,et al.  A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions , 2011, IACR Cryptol. ePrint Arch..