Issues in the Implementation of a 60GHz Transceiver on CMOS

The spectrum around 60 GHz is available for unlicensed operation in many regulatory domains including the USA, Japan, Canada and Australia. One of the applications of this spectrum is for short range communication systems. These systems are designed to deliver gigabit speeds, consuming small amount of power in small form factor. The small factor is achieved because passive components scale with carrier frequency and at 60GHz components such as: transmit receive filters, passives and antennas are candidates for inclusion on the die. Integrating RF, mixed signal and digital components is another important step towards reducing system cost and form factor. In order to achieve low cost and high digital integration CMOS is the process of choice. Unfortunately compared to other much more expensive processes such as SiGe and GaAs, CMOS has greater process variability, lower carrier mobility constants, and smaller device breakdown voltages all of which make millimeter wave RF design particularly challenging. In this paper we outline the issues in the implementation of a Gigabit per second 60GHz Transceiver-on-Chip using CMOS.

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