IO bandwidth controllable memory device and the control method of IO bandwidth

The input and output data Switzerland adjustable memory device and its control method are disclosed Switzerland. Memory device of the present invention generates a control signal by a combination of the address signal which is input together with the read command, a write command or an active command. In response to a control signal and selectively outputs the data supplied from the core block of the memory device through a data output buffer is enabled by a selective data output pad, in response to control signals selectively via the data enable input buffer data from a data input-output pads of the memory device to selectively receive the input data signals of the memory device. Therefore, according to the present invention, depending on the data size required in the system by adjusting the input and output data of the memory device Lewis increasing memory use efficiency to reduce the power consumption of the memory device.