A General Model for Performance Investigations of Priority Based Multiprocessor System

A general discrete time semi-Markov model is developed to investigate the effects of task priorities on the system performance of a multiprocessor system with crossbar interconnection network. The number of priority levels associated with the tasks in the system, connection times of different priority level requests, interrequest time, number of processing elements, and the number of shared resources are the parameters involved in estimation of the performance of the system. The bandwidth, queue length at a memory, waiting time for requests at different priority levels, and processor utilization are the performance measures quantified from the analysis. The results reveal the advantage received by the tasks at higher priority levels and the starvation experienced by the lower priority tasks. This information should be useful in the real-time task scheduling, load balancing, and performance optimization. The results obtained are validated with simulation. >

[1]  Trevor N. Mudge,et al.  A semi-Markov model for the performance of multiple-bus systems , 1985, IEEE Transactions on Computers.

[2]  Dileep Bhandarkar,et al.  Analysis of Memory Interference in Multiprocessors , 1975, IEEE Transactions on Computers.

[3]  K. Mani Chandy,et al.  Computational algorithms for product form queueing networks , 1980 .

[4]  Fusun Ozguner,et al.  A Multimicroprocessor System for Fault Tolerant Control of an Articulated Mechanism , 1984, IEEE Transactions on Industrial Electronics.

[5]  P. C. Sharma,et al.  Modular TMR multiprocessor system , 1989 .

[6]  Borworn Papasratorn,et al.  A Small-Scale Distributed Microprocessor System Using Shared Memory Technique , 1985, IEEE Transactions on Industrial Electronics.

[7]  Amar Gupta,et al.  Microcomputers in Industrial Control Applications , 1984, IEEE Transactions on Industrial Electronics.

[8]  Hideyuki Tokuda,et al.  A Time-Driven Scheduling Model for Real-Time Operating Systems , 1985, RTSS.

[9]  Philip Heidelberger,et al.  Computer Performance Evaluation Methodology , 1984, IEEE Transactions on Computers.

[10]  Philip Enslow,et al.  Multiprocessor Organization—a Survey , 1977, CSUR.

[11]  Sheldon M. Ross,et al.  Stochastic Processes , 2018, Gauge Integral Structures for Stochastic Calculus and Quantum Electrodynamics.

[12]  Nikola Bogunovic.  Process Scheduling Procedure for a Class of Real-Time Comuter Systems , 1987, IEEE Transactions on Industrial Electronics.

[13]  Karsten Schwan,et al.  High-performance operating system primitives for robotics and real-time control systems , 1987, TOCS.

[14]  Marvin H. Solomon,et al.  Processor Interconnection Strategies , 1980, IEEE Transactions on Computers.

[15]  Trevor N. Mudge,et al.  Memory Interference Models with Variable Connection Time , 1984, IEEE Transactions on Computers.

[16]  Harold S. Stone.  Introduction to Computer Architecture , 1980 .

[17]  C. D. Locke,et al.  Best-effort decision-making for real-time scheduling , 1986 .

[18]  Charles H. Sauer.  Computational Methods for Product Form Queueing Networks , 1982 .

[19]  Humoud B. Humoud.  A study in memory interference models (performance evaluation, semi-markov process, markov chain, multiprocessor, multiple-bus system) , 1985 .

[20]  Hubert D. Kirrmann,et al.  Poolpo - A Pool of Processors for Process Control Applications , 1984, IEEE Trans. Computers.

[21]  Mateo Valero,et al.  Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors , 1982, IEEE Transactions on Computers.

[22]  Jeffrey P. Buzen,et al.  Computational algorithms for closed queueing networks with exponential servers , 1973, Commun. ACM.

[23]  Amar Gupta,et al.  Increasing Throughput of Multiprocessor Systems , 1985, IEEE Transactions on Industrial Electronics.

[24]  Miodrag Pravdic,et al.  A Multilevel Microcomputer Structured System For Supervisory Monitoring , 1987, Other Conferences.

[25]  K. Mani Chandy,et al.  Approximate Methods for Analyzing Queueing Network Models of Computing Systems , 1978, CSUR.

[26]  William S. Holderby.  Maintainability Considerations in a Fault Tolerant/Faultproof Systems Design , 1984, IEEE Transactions on Industrial Electronics.

[27]  Gianfranco Balbo,et al.  Computational algorithms for closed queueing networks , 1980 .

[28]  Marco Ajmone Marsan,et al.  Markov Models for Multiple Bus Multiprocessor Systems , 1982, IEEE Transactions on Computers.

[29]  Adriano Valenzano,et al.  Acknowledgement and priority mechanisms in the 802.4 token-bus , 1988 .

[30]  EnslowPhilip.  Multiprocessor Organizationa Survey , 1977 .

[31]  Barry W. Johnson,et al.  A Fault-Tolerant Multiprocessor for Real-Time Control Applications , 1987, Other Conferences.

[32]  Kishor S. Trivedi.  Probability and Statistics with Reliability, Queuing, and Computer Science Applications , 1984 .

[33]  CORNELIS H. HOOGENDOORN.  A General Model for Memory Interference in Multiprocessors , 1977, IEEE Transactions on Computers.