Reconfigurable computing: an innovative solution for multimedia and telecommunication networks simulation

Sequential network simulation is a high time-consuming application, and with the emergence of global multihop networks and gigabit-per-second links is becoming a non-affordable problem with traditional simulations. New techniques for the acceleration of these simulations based on other hardware architectures are required. Previous approaches to simulation acceleration are based on parallel computing and reconfigurable completing. A short review of most outstanding approaches showing its benefits and problems is presented in the paper. A new approach based on mapping network simulations on reconfigurable hardware is presented. Most important features of this system are: the acceleration of the simulation by hardware, and the use of a high level network modeling language which allows a transparent use of the hardware by telecommunication engineers. The core of the proposed environment is an automatic tool that compiles the high-level network model and maps the simulator behaviour into the hardware.

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