19.2mW 2Gbps CMOS pulse receiver for 60GHz band wireless communication
暂无分享,去创建一个
A low-power 60 GHz pulse receiver has been fabricated for over-Gbps wireless communication by a standard 90 nm CMOS process. The receiver consists of a nonlinear detecting amplifier, a limiting amplifier, an offset canceller and a buffer. The measured sensitivity is the average power of -20 dBm for millimeter-wave pulses of 60 GHz. The power dissipation and maximum data rate of the receiver are 19.2 mW and 2 Gbps, respectively. These results indicate the possibility of new low-power and ultrahigh-speed wireless communication using millimeter-wave pulses with CMOS implementation.
[1] R. Fujimoto,et al. A 60-GHz CMOS Receiver with Frequency Synthesizer , 2007, 2007 IEEE Symposium on VLSI Circuits.
[2] K.K. O,et al. Schottky barrier diodes for millimeter wave detection in a foundry CMOS process , 2005, IEEE Electron Device Letters.
[3] N. Krishnapura,et al. A 5Gb/s NRZ transceiver with adaptive equalization for backplane transmission , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..