An MDAC synapse for analog neural networks

Efficient weight storage and multiplication are important design challenges which must be addressed in analog neural network implementations. Many schemes which treat storage and multiplication separately have been previously reported for implementation of synapses. We present a synapse circuit that integrates the weight storage and multiplication into a single, compact multiplying digital-to-analog converter (MDAC) circuit. The circuit has a small layout area (5400 /spl mu/m/sup 2/ in a 1.5-/spl mu/m process) and exhibits good linearity over its entire input range. We have fabricated several synapses and characterize their responses. Average maximum INL and DNL values of 0.2 LSB and 0.4 LSB, respectively, have been measured. We also report on the performance of an analogue neural network which uses these synapses.

[1]  D. Coue,et al.  A four-quadrant subthreshold mode multiplier for analog neural-network applications , 1996, IEEE Trans. Neural Networks.

[2]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[3]  Lawrence D. Jackel,et al.  An analog neural network processor with programmable topology , 1991 .

[4]  Bing J. Sheu,et al.  Design and characterization of analog VLSI neural network modules , 1993 .

[5]  Bing J. Sheu,et al.  Analog floating-gate synapses for general-purpose VLSI neural computation , 1991 .

[6]  Eric A. Vittoz,et al.  Linear networks based on transistors , 1993 .

[7]  Edgar Sanchez-Sinencio,et al.  A modular T-mode design approach for analog neural network hardware implementations , 1992 .

[8]  Ronald S. Gyurcsik,et al.  Toward a general-purpose analog VLSI neural network with on-chip learning , 1997, IEEE Trans. Neural Networks.

[9]  F. Delcomyn.  Neural basis of rhythmic behavior in animals. , 1980, Science.

[10]  D A Durfee,et al.  Comparison of floating gate neural network memory cells in standard VLSI CMOS technology , 1992, IEEE Trans. Neural Networks.

[11]  Gert Cauwenberghs,et al.  An analog VLSI recurrent neural network learning a continuous-time trajectory , 1996, IEEE Trans. Neural Networks.

[12]  M. Al-Nsour,et al.  ANN digitally programmable analog synapse , 1999, 42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356).

[13]  Randall D. Beer,et al.  On the Dynamics of Small Continuous-Time Recurrent Neural Networks , 1995, Adapt. Behav..