论文信息 - Analysis and simulation of a 2nd order ΔΣ modulator with single-comparator multi-bit quantizer

Analysis and simulation of a 2nd order ΔΣ modulator with single-comparator multi-bit quantizer

A 2nd order ΔΣ modulator is presented. The feed forward topology with multi-bit quantizer is adopted. The digital summing is used. Single comparator successive approximation quantizer is proposed. Non-ideal effects of the quantizer such as comparator offset, components mismatch are modeled and simulated. Power consumption of the quantizer is given analytically. This topology is suitable to build high resolution ΔΣ modulator with low power consumption under low voltage.

Liyuan Liu | Zhihua Wang | Dongmei Li | Yafei Ye

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