Wavefront Array Processors-Concept to Implementation

Most signal and image processing algorithms can be decomposed into computational wavefronts that can be processed on pipelined arrays. T he supervisory overhead incurred in general-purpose supercom-T puters often makes them too slow and expensive for real-time signal and image processing. To achieve a through-put rate adequate for these applications, the only feasible alternative appears to be massively concurrent processing by special-purpose hardware-by array processors. Progress in VLSI technology has lowered implementation costs for large array processors to an acceptable level, and CAD techniques have facilitated speedy prototyping and implementation of application-oriented (or algorithm-oriented) array processors. Digital signal and image processing encompasses a variety of mathematical and algorithmic techniques. Most signal and image processing algorithms are dominated by transform techniques, con-volution and correlation filtering, and certain key linear algebraic methods. These algorithms possess properties such as regularity, recursiveness, and locality, and these properties can be exploited in array processor design. With VLSI it becomes feasible to construct an array processor that closely resembles the flow graph of a particular algorithm. This type of array maximizes the main strength of VLSI-intensive computing power-and yet circumvents its main weakness-restricted communication.