Leakage effects in metal-connected floating-gate circuits

Floating-gate circuits are useful in many analog applications, although controlling the charge stored on floating gates complicates such circuits. It has been observed that when floating poly gates are connected to metal layers, initial charge is eliminated during fabrication. This Brief presents an alternative to a previously published explanation for this effect. Experiments show that leakage through deposited inter-metal dielectrics is large enough at moderately elevated temperatures to significantly affect circuit operation. Simple modeling suggests that at temperatures typical of back-end integrated circuit processing, leakage would be large enough to rapidly discharge such floating gates.

[1]  Paul Hasler,et al.  Multiple-input translinear element networks , 2001 .

[2]  W. P. Millard,et al.  Calibration and matching of floating gate devices , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[3]  Robert Fox,et al.  Comparison of Quasi-/Pseudo-Floating Gate Techniques and Low-Voltage Applications , 2006 .

[4]  Tor Sverre Lande,et al.  Floating-Gate Circuits and Systems , 2002 .

[5]  Esther Rodriguez-Villegas,et al.  Solution to trapped charge in FGMOS transistors , 2003 .

[6]  Paul E. Hasler,et al.  A precision CMOS amplifier using floating-gates for offset cancellation , 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

[7]  Stilianos Siskos,et al.  Design of voltage-mode and current-mode computational circuits using floating-gate MOS transistors , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8]  E. Rodriguez-Villegas,et al.  A 1-V micropower log-domain integrator based on FGMOS transistors operating in weak inversion , 2004, IEEE Journal of Solid-State Circuits.

[9]  Rampi Ramprasad,et al.  Phenomenological theory to model leakage currents in metal–insulator–metal capacitor systems , 2003 .

[10]  Inchang Seo,et al.  Comparison of quasi-/pseudo-floating gate techniques , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[11]  Carver A. Mead,et al.  Neuromorphic electronic systems , 1990, Proc. IEEE.

[12]  Tor Sverre Lande,et al.  Programming floating-gate circuits with UV-activated conductances , 2001 .

[13]  Chris Toumazou,et al.  Trade-Offs in Analog Circuit Design , 2002 .