Stochastic Circuit Design of Image Contrast Stretching

Stochastic computing (SC) is a promising technology with low power consumption, low area cost and high fault tolerance for hardware design. This paper presents the circuit design of image contrast stretching by using the SC technique. The proposed architecture requires only one random number generator by exploiting the positive correlation between bit-streams and integrates the JK flip flop into the new circuit for image contrast stretching. Synthesized results of hardware implementation indicate there are reductions of 44%, 42% and 45% in area, delay and power consumption over the existing Markov-based finite state machine (FSM) design.