Tunable N-Path Notch Filters for Blocker Suppression: Modeling and Verification

N-path switched-RC circuits can realize filters with very high linearity and compression point while they are tunable by a clock frequency. In this paper, both differential and single-ended N-path notch filters are modeled and analyzed. Closed-form equations provide design equations for the main filtering characteristics and nonidealities such as: harmonic mixing, switch resistance, mismatch and phase imbalance, clock rise and fall times, noise, and insertion loss. Both an eight-path single-ended and differential notch filter are implemented in 65-nm CMOS technology. The notch center frequency, which is determined by the switching frequency, is tunable from 0.1 to 1.2 GHz. In a 50-Ω environment, the N-path filters provide power matching in the passband with an insertion loss of 1.4-2.8 dB. The rejection at the notch frequency is 21-24 dB, P1 dB > +2 dBm, and IIP3 > +17 dBm.

[1]  Eric A. M. Klumperink,et al.  8-Path tunable RF notch filters for blocker suppression , 2012, 2012 IEEE International Solid-State Circuits Conference.

[2]  Jui-Yi Lin,et al.  Power-Constrained Third-Order Active Notch Filter Applied in IR-LNA for UWB Standards , 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

[3]  Ahmad Mirzaei,et al.  Analysis of Imperfections on Performance of 4-Phase Passive-Mixer-Based High-Q Bandpass Filters in SAW-Less Receivers , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[4]  Alyosha C. Molnar,et al.  Implications of Passive Mixer Transparency for Impedance Matching and Noise Figure in Passive Mixer-First Receivers , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

[5]  Bram Nauta,et al.  A differential 4-path highly linear widely tunable on-chip band-pass filter , 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

[6]  Bosco Leung,et al.  VLSI for wireless communication , 2002 .

[7]  M. Tiebout,et al.  A 0.13/spl mu/m CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[8]  Alyosha C. Molnar,et al.  A Passive Mixer-First Receiver With Digitally Controlled and Widely Tunable RF Interface , 2010, IEEE Journal of Solid-State Circuits.

[9]  Ahmad Mirzaei,et al.  Architectural Evolution of Integrated M-Phase High-Q Bandpass Filters , 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

[10]  Eric A. M. Klumperink,et al.  Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification , 2011, IEEE Journal of Solid-State Circuits.

[11]  T. Strom,et al.  Analysis of periodically switched linear circuits , 1977 .

[12]  Eric A. M. Klumperink,et al.  Unified Frequency-Domain Analysis of Switched-Series-$RC$ Passive Mixers and Samplers , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

[13]  Eric A. M. Klumperink,et al.  A 50Mhz-To-1.5Ghz Cross-Correlation CMOS Spectrum Analyzer for Cognitive Radio with 89dB SFDR in 1Mhz RBW , 2010, 2010 IEEE Symposium on New Frontiers in Dynamic Spectrum (DySPAN).

[14]  D. Flandre,et al.  Fully Integrated High-Q Switched Capacitor Bandpass Filter with Center Frequency and Bandwidth Tuning , 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

[15]  K.S.J. Pister,et al.  Low-Power 2.4-GHz Transceiver With Passive RX Front-End and 400-mV Supply , 2006, IEEE Journal of Solid-State Circuits.

[16]  H. Samavati,et al.  5-GHz CMOS wireless LANs , 2002 .

[17]  I. W. Sandberg,et al.  An alternative approach to the realization of network transfer functions: The N-path filter , 1960 .

[18]  H. Darabi,et al.  A Blocker Filtering Technique for SAW-Less Wireless Receivers , 2007, IEEE Journal of Solid-State Circuits.

[20]  Ahmad Mirzaei,et al.  A 65 nm CMOS Quad-Band SAW-Less Receiver SoC for GSM/GPRS/EDGE , 2011, IEEE Journal of Solid-State Circuits.

[21]  Ahmad Mirzaei,et al.  A Low-Power Process-Scalable Super-Heterodyne Receiver With Integrated High-$Q$ Filters , 2011, IEEE Journal of Solid-State Circuits.

[22]  Lawrence E. Larson,et al.  An Active Transmitter Leakage Suppression Technique for CMOS SAW-Less CDMA Receivers , 2010, IEEE Journal of Solid-State Circuits.

[23]  Eric A. M. Klumperink,et al.  A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.