Implicit Privatization Using Private Transactions

In software transactional memory (STM) systems, it is useful to isolate a memory region accessed by one thread from all others, so that it can then operate on it “privately”, that is, without the instrumentation overhead of inter-transactional synchronization. Allowing transactions to implicitly privatize memory is a source of major performance degradation in state-of-the-art STMs. The alternative, to explicitly declare and guarantee privacy only when needed, has been argued to be too tricky to be useful for general programming. This paper proposes private transactions, a simple intermediate that combines the ease of use of implicit privatization, with the efficiency that can be obtained from explicitly knowing which regions are private. We present a new scalable quiescing algorithm for implicit privatization using private transactions, applicable to virtually any STM algorithm, including the best performing TL2/LSA-style STMs. The new algorithm delivers virtually unhindered performance at all privatization levels when private transactions involve work, and even under the extreme case of empty private transactions, allows for a scalable “pay as you go” privatization overhead depending on the privatization level.

[1]  Adam Welc,et al.  Practical weak-atomicity semantics for java stm , 2008, SPAA '08.

[2]  Rachid Guerraoui,et al.  Stretching transactional memory , 2009, PLDI '09.

[3]  Adam Welc,et al.  Single global lock semantics in a weakly atomic STM , 2008, SIGP.

[4]  Martín Abadi,et al.  Semantics of transactional memory and automatic mutual exclusion , 2011, TOPL.

[5]  Michael F. Spear,et al.  Scalable Techniques for Transparent Privatization in Software Transactional Memory , 2008, 2008 37th International Conference on Parallel Processing.

[6]  Michael F. Spear,et al.  Ordering-Based Semantics for Software Transactional Memory , 2008, OPODIS.

[7]  Bratin Saha,et al.  Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language , 2007, International Symposium on Code Generation and Optimization (CGO'07).

[8]  Adam Welc,et al.  Irrevocable transactions and their applications , 2008, SPAA '08.

[9]  Bratin Saha,et al.  McRT-STM: a high performance software transactional memory system for a multi-core runtime , 2006, PPoPP '06.

[10]  Torvald Riegel,et al.  A Lazy Snapshot Algorithm with Eager Validation , 2006, DISC.

[11]  Nir Shavit,et al.  TLRW: return of the read-write lock , 2010, SPAA '10.

[12]  Maged M. Michael,et al.  RingSTM: scalable transactions with a single atomic instruction , 2008, SPAA '08.

[13]  Torvald Riegel,et al.  Dynamic performance tuning of word-based software transactional memory , 2008, PPoPP.

[14]  David R. Cheriton,et al.  Leases: an efficient fault-tolerant mechanism for distributed file cache consistency , 1989, SOSP '89.

[15]  Nir Shavit,et al.  Transactional Locking II , 2006, DISC.