Conformal Mapping Solution for Interdigital Comb Capacitors Between Ground Planes

Capacitance per unit length of wire is an important parameter in the design of interconnections for integrated circuits due to its influence on signal delay, cross-talk, and power dissipation. Exact expressions for capacitance are rarely available for wiring structures of interest in microelectronic applications, however. In general, numerical methods are required but these have systematic errors that can impact performance modeling and verification. This letter derives a conformal mapping solution for capacitance of interdigital comb structures similar to devices used for microelectronic interconnect characterization. Systematic overestimation of capacitance from numerical modeling is illustrated by comparison with results from finite-element modeling.