Direct digital frequency synthesizers using high-order polynomial approximation

Two 80 MHz 0.35 /spl mu/m 3.3V CMOS ROM-less DDFS using polynomial approximation are compared with Cordic-based circuits. A 60 dBc SFDR DDFS uses 2nd-order polynomials and 0.18 mm/sup 2/, with 15 mW dissipation. An 80 dBc SFDR DDFS uses 3rd-order polynomials and 0.44 mm/sup 2/, with 35 mW dissipation.