Investigations on the Vulnerability of Advanced CMOS Technologies to MGy Dose Environments
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O. Faynot | F. Andrieu | M. Gaillardin | S. Barraud | P. Magnan | P. Paillet | S. Girard | C. Marcandella | J. L. Leray | M. Raine | V. Goiffon | M. Martinez | O. Duhamel | N. Richard | O. Faynot | J. Leray | F. Andrieu | P. Paillet | S. Barraud | S. Girard | P. Magnan | V. Goiffon | C. Marcandella | M. Gaillardin | M. Raine | O. Duhamel | N. Richard | M. Martinez
[1] Michiel Steyaert,et al. Conceptual design of a MGy tolerant integrated signal conditioning circuit in 130nm and 700nm CMOS , 2012 .
[2] M. Gaillardin,et al. Enhanced Radiation-Induced Narrow Channel Effects in Commercial ${\hbox {0.18}}~\mu$ m Bulk Technology , 2011, IEEE Transactions on Nuclear Science.
[3] G. Knoblinger,et al. Radiation Dose Effects in Trigate SOI MOS Transistors , 2006, IEEE Transactions on Nuclear Science.
[4] A. Umbert,et al. Limiting factors for SOI VLSI high-level hardness: modeling and improving , 1989, IEEE SOS/SOI Technology Conference.
[5] Pascale Gouker,et al. Substrate removal and BOX thinning effects on total dose response of FDSOI NMOSFET , 2003 .
[6] P. S. Winokur,et al. An Evaluation of Low-Energy X-Ray and Cobalt-60 Irradiations of MOS Transistors , 1987, IEEE Transactions on Nuclear Science.
[7] Hyung-Kyu Lim,et al. Threshold voltage of thin-film Silicon-on-insulator (SOI) MOSFET's , 1983, IEEE Transactions on Electron Devices.
[8] Sorin Cristoloveanu,et al. High tolerance to total ionizing dose of Ω-shaped gate field-effect transistors , 2006 .
[9] Jean-Luc Leray,et al. Activation Energies of Oxide Charge Recovery in SOS or SOI Structures after an Ionizing Pulse , 1985, IEEE Transactions on Nuclear Science.
[10] R.,et al. Challenges in hardening technologies using shallow-trench isolation , 1998 .
[11] P. Dodd,et al. Radiation effects in SOI technologies , 2003 .
[12] J. L. Pelloie,et al. Worst-case bias during total dose irradiation of SOI transistors , 2000 .
[13] John Sochacki,et al. The sensitivity of radiation-induced leakage to STI topology and sidewall doping , 2011, Microelectron. Reliab..
[14] En Xia Zhang,et al. Total-ionizing-dose radiation response of partially-depleted SOI devices , 2010, 2010 IEEE International SOI Conference (SOI).
[15] O. Faynot,et al. Total Ionizing Dose Effects on Triple-Gate FETs , 2006, IEEE Transactions on Nuclear Science.
[16] P. Leroux,et al. Influence of Fin Width on the Total Dose Behavior of p-Channel Bulk MuGFETs , 2010, IEEE Electron Device Letters.
[17] En Xia Zhang,et al. Fin-Width Dependence of Ionizing Radiation-Induced Subthreshold-Swing Degradation in 100-nm-Gate-Length FinFETs , 2009, IEEE Transactions on Nuclear Science.
[18] Daniel M. Fleetwood,et al. Charge yield for cobalt-60 and 10-keV X-ray irradiations of MOS devices , 1991 .
[19] G. Cervelli,et al. Radiation-induced edge effects in deep submicron CMOS transistors , 2005, IEEE Transactions on Nuclear Science.
[20] B. Giffard,et al. CMOS/SOI HARDENING AT 100 MRAD(Si0,) , 2013 .
[21] O. Faynot,et al. Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below , 2010, 2009 Proceedings of ESSCIRC.
[22] A. Johnston,et al. Space Radiation Effects and Reliability Considerations for Micro- and Optoelectronic Devices , 2010, IEEE Transactions on Device and Materials Reliability.
[23] P E Dodd,et al. Current and Future Challenges in Radiation Effects on CMOS Electronics , 2010, IEEE Transactions on Nuclear Science.
[24] R. Locoe. Designing radiation hardened CMOS microelectronic components at commercial foundries: space and terrestrial radiation environments and device and circuit techniques to mitigate radiation effects , 2005, 2005 IEEE International Integrated Reliability Workshop.
[25] O. Faynot,et al. Total ionizing dose effects on deca-nanometer fully depleted SOI devices , 2005, IEEE Transactions on Nuclear Science.
[26] T. Skotnicki,et al. Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below , 2009, 2009 Proceedings of the European Solid State Device Research Conference.
[27] B. Giffard,et al. CMOS/SOI hardening at 100 Mrad (SiO/sub 2/) , 1990 .
[28] Marty R. Shaneyfelt,et al. Comparison of charge yield in MOS devices for different radiation sources , 2002 .
[29] X. Garros,et al. New insight on VT stability of HK/MG stacks with scaling in 30nm FDSOI technology , 2010, 2010 Symposium on VLSI Technology.
[30] X. Garros,et al. /spl Omega/FETs transistors with TiN metal gate and HfO/sub 2/ down to 10nm , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..