A parallel architecture for probabilistic relaxation operations on images

Abstract The design of a parallel architecture for executing probabilistic relaxation operations on two dimensional images is addressed. First of all, the concerned relaxation process is divided into three different parallel operations, i.e. systolic, simultaneous, and pipelined. All these parallel operations are mapped onto a linear array architecture that runs smoothly without any bottleneck in the data flows. The proposed architecture and its components are described. An illustrative running of the relaxation process for an image thresholding application on the architecture is described in some details. The hardware implementation and CAD logic simulation are then given. Finally, performance comparison between the proposed architecture and some existing ones is reported.

[1]  Concettina Guerra.  Systolic Algorithnis for Local Operations on Images , 1986, IEEE Transactions on Computers.

[2]  Azriel Rosenfeld,et al.  Thresholding Using Relaxation , 1981, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[3]  Dana H. Ballard,et al.  Computer Vision , 1982 .

[4]  H. T. Kung,et al.  The Warp Computer: Architecture, Implementation, and Performance , 1987, IEEE Transactions on Computers.

[5]  Ronald Lumia,et al.  PIPE (Pipelined Image-Processing Engine) , 1985, J. Parallel Distributed Comput..

[6]  T. J. Fountain,et al.  Processor Arrays: Architecture and Applications , 1987 .

[7]  Kenneth E. Batcher,et al.  Design of a Massively Parallel Processor , 1980, IEEE Transactions on Computers.

[8]  Azriel Rosenfeld,et al.  Scene Labeling by Relaxation Operations , 1976, IEEE Transactions on Systems, Man, and Cybernetics.

[9]  S. Kung,et al.  VLSI Array processors , 1985, IEEE ASSP Magazine.

[10]  Hiromitsu Yamada,et al.  A parallel architecture for relaxation operations , 1988, Pattern Recognition.

[11]  Chee Sun Won,et al.  A parallel image segmentation algorithm using relaxation with varying neighborhoods and its mapping to array processors , 1987, Computer Vision Graphics and Image Processing.

[12]  J. Kittler,et al.  RELAXATION LABELING ALGORITHMS - A REVIEW , 1985 .

[13]  Daniel P. Lopresti,et al.  Architecture of a programmable systolic array , 1988, [1988] Proceedings. International Conference on Systolic Arrays.

[14]  Azriel Rosenfeld,et al.  Relaxation: Evaluation and Applications , 1981, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[15]  Joan S. Weszka,et al.  A survey of threshold selection techniques , 1978 .

[16]  Azriel Rosenfeld,et al.  Iterative methods in image analysis , 1978, Pattern Recognit..

[17]  Josef Kittler,et al.  Relaxation labelling algorithms - a review , 1986, Image Vis. Comput..