Event-based re-training of statistical contention models for heterogeneous multiprocessors

Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of new events/data from the outside world. Traditionally, the designers model these events by explicitly coupling them to corresponding simulation events within environments such as SystemC. However, this approach places a burden on the designer to identify which events are important enough to be captured by simulation, resulting in an overly conservative selection of events to model. This work presents a technique for de-coupling of system events from simulation events, removing the burden from the designer to determine which events significantly affect the system performance model, while decreasing simulation runtime. Enabling this de-coupling is a prediction model that quantifies the magnitude of changes introduced by system events, and identifies those important enough to be considered simulation events. The prediction model is evaluated by over 4000 separate scenarios featuring dynamic event changes to processor speed, bus speed, application type, and application input data, finding that almost 70% of tested events impacted contention modeling by less than 10%. Without resorting to detailed simulation, the prediction model captures the system event effects to within 5% of actual measured error, while staying within 18% in 95% of all tests.