论文信息 - Enabling the high level synthesis of data analytics accelerators

Enabling the high level synthesis of data analytics accelerators

Conventional High Level Synthesis (HLS) tools mainly target compute intensive kernels typical of digital signal processing applications. We are developing techniques and architectural templates to enable HLS of data analytics applications. These applications are memory intensive, present fine-grained, unpredictable data accesses, and irregular, dynamic task parallelism. We discuss an architectural template based around a distributed controller to efficiently exploit thread level parallelism. We present a memory interface that supports parallel memory subsystems and enables implementing atomic memory operations. We introduce a dynamic task scheduling approach to efficiently execute heavily unbalanced workload. The templates are validated by synthesizing queries from the Lehigh University Benchmark (LUBM), a well know SPARQL benchmark.

Marco Minutoli | Vito Giovanni Castellana | Antonino Tumeo | Fabrizio Ferrandi | Marco Lattuada

[1] Antonino Tumeo,et al. Irregular Applications: From Architectures to Algorithms [Guest editors' introduction] , 2015, Computer.

[2] Vito Giovanni Castellana,et al. In-Memory Graph Databases for Web-Scale Data , 2015, Computer.

[3] Vito Giovanni Castellana,et al. An adaptive Memory Interface Controller for improving bandwidth utilization of hybrid and reconfigurable systems , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[4] Jeff Heflin,et al. LUBM: A benchmark for OWL knowledge base systems , 2005, J. Web Semant..

[5] Simone Secchi,et al. Irregular applications: architectures & algorithms , 2011, IA3 '11.

[6] Fabrizio Ferrandi,et al. Bambu : A Free Framework for the High Level Synthesis of Complex Applications , 2012 .

[7] Marco Minutoli,et al. High level synthesis of RDF queries for graph analytics , 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).