SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver
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To achieve a wide dynamic range, the noise figure of the LNA and linearity of the mixer are of primary concern. Figure 2 shows the circuit schematic of the LNA. A differential architecture is chosen in anticipation of eventual integration of a complete GPS receiver. Its common mode rejection eases the task of rejecting interference from other on-chip elements, such as a DSP core. This choice results in increased amplifier noise for a given power dissipation compared to a single-ended implementation. This increase is mitigated by the high ωT of the process, that permits acceptable noise performance despite a differential implementation.
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