A reconfigurable computing architecture using magnetic tunneling junction memories

This work presents a new dynamically reconfigurable architecture that uses magnetic tunneling junctions to implement non-volatile reconfiguration memories. The magnetic-based storage elements further provide a very effective implementation of multi-context planes. The proposed architecture is organized as a 2-dimensional array of double precision floating-point run-time reconfigurable execution units. The configuration information defines the operation to be executed and the data flow intra and inter execution units. A prototype design of the coarse-grained reconfigurable array has been implemented targeting a 65nm CMOS technology. The obtained results confirm that the proposed architecture provides a significant computational density and that the magnetic memories provide a very area efficient multi-context based run-time reconfigurability.

[1]  Eric Belhaire,et al.  TAS-MRAM based Non-volatile FPGA logic circuit , 2007, 2007 International Conference on Field-Programmable Technology.

[2]  Mário P. Véstias,et al.  Non-volatile memory circuits for FIMS and TAS writing techniques on magnetic tunnelling junctions , 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

[3]  Mário P. Véstias,et al.  A High-Performance Reconfigurable Computing architecture using a magnetic configuration memory , 2012, 2012 International Conference on Reconfigurable Computing and FPGAs.

[4]  Bertil Svensson,et al.  Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing , 2009, Microprocess. Microsystems.

[5]  Lionel Torres,et al.  Magnetic tunnelling junction based FPGA , 2006, FPGA '06.