GORDIAN: a new global optimization/rectangle dissection method for cell placement
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[1] J. Blanks. Near-Optimal Placement Using a Quadratic Objective Function , 1985, DAC 1985.
[2] Brian W. Kernighan,et al. An efficient heuristic procedure for partitioning graphs , 1970, Bell Syst. Tech. J..
[3] Brian W. Kernighan,et al. A Procedure for Placement of Standard-Cell VLSI Circuits , 1985, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[4] Gerhard Zimmerman,et al. A new area and shape function estimation technique for VLSI layouts , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..
[5] Ernest S. Kuh,et al. Proud: a fast sea-of-gates placement algorithm , 1988, DAC '88.
[6] R. M. Mattheyses,et al. A Linear-Time Heuristic for Improving Network Partitions , 1982, 19th Design Automation Conference.
[7] Ulrich Lauther,et al. A Min-Cut Placement Algorithm for General Cell Assemblies Based on a Graph Representation , 1979, 16th Design Automation Conference.
[8] Stephen W. Director,et al. Mason: A Global Floorplanning Approach for VLSI Design , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[9] Chung-Kuan Cheng,et al. Module Placement Based on Resistive Network Optimization , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[10] E. Polak. Introduction to linear and nonlinear programming , 1973 .
[11] Knut M. Just,et al. On the Relative Placement and the Transportation Problem for Standard-Cell Layout , 1986, DAC 1986.
[12] D. A. Mlynski,et al. A Combined Force and Cut Algorithm for Hierarchical VLSI Layout , 1982, DAC 1982.