Automatic Synthesis of Vision Automata

We are very thankfull to Marc ECCHER, Etienne ALLARD, Thierry BOMMARD and Serge DACIC whose ideas were used in this work and who contributed greatly during the early phases of this research. We are also very thankfull to the other dozen of researchers that, over the years, built the HECATE emulator.

[1]  Michael J. Flynn,et al.  Some Computer Organizations and Their Effectiveness , 1972, IEEE Transactions on Computers.

[2]  Bertrand Zavidovique,et al.  A high level synthesis algorithm including control constraints , 1992, Microprocess. Microprogramming.

[3]  Bertrand Zavidovique,et al.  Mechanism to capture and communicate image-processing expertise , 1991, IEEE Software.

[4]  Arthur J. Bernstein,et al.  Analysis of Programs for Parallel Processing , 1966, IEEE Trans. Electron. Comput..

[5]  Pierre G. Paulin,et al.  Horizontal Partitioning of PLA-based Finite State Machines , 1989, 26th ACM/IEEE Design Automation Conference.

[6]  William B. Ackerman,et al.  Data Flow Languages , 1899, Computer.

[7]  Tiziano Villa,et al.  NOVA: State Assignment of Finite State Machines for Optimal Two-Level Logic Implementations , 1989, 26th ACM/IEEE Design Automation Conference.

[8]  Steven R. Vegdahl,et al.  A Survey of Proposed Architectures for the Execution of Functional Languages , 1984, IEEE Transactions on Computers.

[9]  Bruce D. Shriver,et al.  Local Microcode Compaction Techniques , 1980, CSUR.

[10]  Raymond J. Offen VLSI image processing , 1986 .

[11]  James P. Anderson,et al.  Program structures for parallel processing , 1965, Commun. ACM.

[12]  S. Levialdi,et al.  Languages and architectures for image processing , 1981 .

[13]  M. Coster,et al.  Précis d'analyse d'images , 1989 .

[14]  B. Zavidovique,et al.  A data-flow processor for real-time low-level image processing , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[15]  Emile H. L. Aarts,et al.  Simulated Annealing: Theory and Applications , 1987, Mathematics and Its Applications.

[16]  Alice C. Parker,et al.  Synthesis of Hardware for the Control of Digital Systems , 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[17]  Duncan H. Lawrie,et al.  High Speed Computer and Algorithm Organization , 1977 .

[18]  David E. Culler,et al.  Dataflow architectures , 1986 .

[19]  Daniel Gajski,et al.  Chippe: a system for constraint driven behavioral synthesis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[20]  A.E. Ruehli,et al.  Circuit analysis, logic simulation, and design verification for VLSI , 1983, Proceedings of the IEEE.

[21]  Jay R. Southard,et al.  MacPitts: An Approach to Silicon Compilation , 1983, Computer.

[22]  E. Allart,et al.  Image processing VLSI design through functional match between algorithms and architecture , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[23]  Claude Berge Hypergraphes : combinatoire des ensembles finis , 1987 .

[24]  John H. Williams,et al.  On the Development of the Algebra of Functional Programs , 1982, TOPL.

[25]  Wayne Wolf An Object-Oriented, Procedural Database for VLSI Chip Planning , 1986, DAC 1986.

[26]  Jack B. Dennis,et al.  Data Flow Supercomputers , 1980, Computer.

[27]  John W. Backus,et al.  Can programming be liberated from the von Neumann style?: a functional style and its algebra of programs , 1978, CACM.

[28]  Stefano Levialdi,et al.  Computer Architectures for Pictorial Information Systems , 1981, Computer.

[29]  Marc Eccher Architecture parallele dediee a l'etude d'automates de vision en temps reel , 1992 .

[30]  David A. Padua,et al.  A Second Opinion on Data Flow Machines and Languages , 1982, Computer.