A 1V fractional-N PLL with nonlinearity-insensitive modulator

A 1V fractional-N PLL is proposed in 40nm technology. With modified VCO, it can be operated under 1V supply with wide tuning range and low supply sensitivity. Besides, conventional 3rd MASH SDM is sensitive to nonlinearity caused by analog path, generating in-band fractional spur that cannot be filtered by PLL loop. In order to lower the sensitivity to nonlinearity, a new type of modulator is proposed. Theorem derivation and simulation results show that this modulator is insensitive to 2nd-5th order nonlinearity. The measured in-band worst-case fractional and reference spur are -64.5dBc and -81dBc, respectively. The RMS jitter is 3.91ps under 5.85mW power consumption.

[1]  Taeik Kim,et al.  15.2 A 0.012mm2 3.1mW bang-bang digital fractional-N PLL with a power-supply-noise cancellation technique and a walking-one-phase-selection fractional frequency divider , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[2]  Che-Fu Liang,et al.  A wideband fractional-N ring PLL with fractional-spur suppression using spectrally shaped segmentation , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[3]  Ian Galton,et al.  Spurious -Tone Suppression Techniques Applied to a Wide-Bandwidth 2.4GHz Fractional-N PLL , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[4]  Ping-Ying Wang,et al.  15.3 A 2.4GHz ADPLL with digital-regulated supply-noise-insensitive and temperature-self-compensated ring DCO , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[5]  Ping-Ying Wang,et al.  10.8 A wideband fractional-N ring PLL using a near-ground pre-distorted switched-capacitor loop filter , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[6]  Ahmed Elkholy,et al.  A 4.25GHz–4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement , 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.