Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

Over the past 10 years, the designers of intellectual properties (IP) have faced increasing threats including cloning, counterfeiting, and reverse-engineering. This is now a critical issue for the microelectronics industry. The design of a secure, efficient, lightweight protection scheme for design data is a serious challenge for the hardware security community. In this context, this chapter presents two ultra-lightweight transmitters using side channel leakage based on electromagnetic emanation to send embedded IP identity discreetly and quickly.

[1]  Ashish Tiwari,et al.  Reverse Engineering Digital Circuits Using Structural and Functional Analyses , 2014, IEEE Transactions on Emerging Topics in Computing.

[2]  Ann Gordon-Ross,et al.  A survey on cache tuning from a power/energy perspective , 2013, CSUR.

[3]  Mark Mohammad Tehranipoor,et al.  Trustworthy Hardware: Identifying and Classifying Hardware Trojans , 2010, Computer.

[4]  Mark Mohammad Tehranipoor,et al.  A Sensitivity Analysis of Power Signal Methods for Detecting Hardware Trojans Under Real Process and Environmental Conditions , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[5]  Lilian Bossuet,et al.  Architectures of flexible symmetric key crypto engines—a survey: From hardware coprocessor to multi-crypto-processor system on chip , 2013, CSUR.

[6]  Tom Kean,et al.  Protecting designs with a passive thermal tag , 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

[7]  Lilian Bossuet,et al.  SALWARE: Salutary Hardware to design Trusted IC. , 2013 .

[8]  Kaushik Roy,et al.  Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis , 2013, IEEE Transactions on Computers.

[9]  Lilian Bossuet,et al.  Survey of hardware protection of design data for integrated circuits and intellectual properties , 2014, IET Comput. Digit. Tech..

[10]  Berk Sunar,et al.  Trojan Detection using IC Fingerprinting , 2007, 2007 IEEE Symposium on Security and Privacy (SP '07).

[11]  Rajat Subhra Chakraborty,et al.  Hardware IP Protection During Evaluation Using Embedded Sequential Trojan , 2012, IEEE Design & Test of Computers.

[12]  Lilian Bossuet,et al.  HCrypt: A Novel Concept of Crypto-processor with Secured Key Management , 2010, 2010 International Conference on Reconfigurable Computing and FPGAs.

[13]  M. Pecht,et al.  Bogus: electronic manufacturing and consumers confront a rising tide of counterfeit electronics , 2006, IEEE Spectrum.

[14]  Stefan Katzenbeisser,et al.  PUFs: Myth, Fact or Busted? A Security Evaluation of Physically Unclonable Functions (PUFs) Cast in Silicon , 2012, CHES.

[15]  Tim Güneysu,et al.  Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering , 2009, CHES.

[16]  Bertrand Le Gal,et al.  Automatic low-cost IP watermarking technique based on output mark insertions , 2012, Des. Autom. Embed. Syst..

[17]  Jeyavijayan Rajendran,et al.  Hardware security: Threat models and metrics , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[18]  Yiorgos Makris,et al.  Counterfeit electronics: A rising threat in the semiconductor manufacturing industry , 2013, 2013 IEEE International Test Conference (ITC).

[19]  Yiorgos Makris,et al.  Hardware Trojan detection using path delay fingerprint , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

[20]  Lilian Bossuet,et al.  IP watermark verification based on power consumption analysis , 2014, 2014 27th IEEE International System-on-Chip Conference (SOCC).

[21]  Lilian Bossuet,et al.  A PUF Based on a Transient Effect Ring Oscillator and Insensitive to Locking Phenomenon , 2014, IEEE Transactions on Emerging Topics in Computing.

[22]  Celia Gorman,et al.  Counterfeit chips on the rise , 2012 .

[23]  Axel Poschmann,et al.  TROJANUS: An ultra-lightweight side-channel leakage generator for FPGAs , 2013, 2013 International Conference on Field-Programmable Technology (FPT).

[24]  Marcin Wójcik,et al.  Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software , 2010, INTRUST.

[25]  Lilian Bossuet,et al.  Experimental implementation of 2ODPA attacks on AES design with flash-based FPGA technology , 2010, 2010 International Conference on Microelectronics.

[26]  Ujjwal Guin,et al.  Counterfeit Integrated Circuits: Detection and Avoidance , 2015 .

[27]  Lilian Bossuet,et al.  Correlated power noise generator as a low cost DPA countermeasures to secure hardware AES cipher , 2009, 2009 3rd International Conference on Signals, Circuits and Systems (SCS).

[28]  Dick James,et al.  The state-of-the-art in semiconductor reverse engineering , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

[29]  Swarup Bhunia,et al.  Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detection , 2010, CHES.

[30]  François Durvaux,et al.  Intellectual property protection for FPGA designs with soft physical hash functions: First experimental results , 2013, 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

[31]  Bruno Robisson,et al.  Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator , 2012, COSADE.

[32]  Siva Sai Yerubandi,et al.  Differential Power Analysis , 2002 .

[33]  Lilian Bossuet,et al.  Contactless transmission of intellectual property data to protect FPGA designs , 2015, 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

[34]  Farinaz Koushanfar,et al.  A Survey of Hardware Trojan Taxonomy and Detection , 2010, IEEE Design & Test of Computers.

[35]  Tim Güneysu,et al.  Side channels as building blocks , 2012, Journal of Cryptographic Engineering.

[36]  Christof Paar,et al.  Side-channel based watermarks for integrated circuits , 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

[37]  Jürgen Teich,et al.  Power Signature Watermarking of IP Cores for FPGAs , 2008, J. Signal Process. Syst..