Novel Pin Assignment Algorithms for Components with Very High Pin Counts

The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of signals to component pins. For modern components that have as many as several thousand pins, this pin assignment cannot be optimized manually. This paper presents four novel pin assignment algorithms that automatically create optimized pin assignments for wiring substrate designs with components that have very high pin counts. We also present and evaluate quality estimation metrics that enable fast assessment of the pin assignment results. The efficiency of our algorithms allows the creation of optimized pin assignments using only minutes of computation time. We show the applicability of all four algorithms, including their strengths and weaknesses, in specific design applications.

[1]  Malgorzata Marek-Sadowska,et al.  Floorplanning with pin assignment , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[2]  Gaetano Borriello,et al.  Pin assignment for multi-FPGA systems , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Norman L. Koren Pin assignment in automated printed circuit board design , 1972, DAC '72.

[4]  Massoud Pedram,et al.  I/O pad assignment based on the circuit structure , 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[5]  H. Nelson Brady An Approach to Topological Pin Assignment , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  Wayne Wei-Ming Dai,et al.  Pin assignment and routing on a single-layer Pin Grid Array , 1995, ASP-DAC '95.

[7]  ZVI GALIL,et al.  Efficient algorithms for finding maximum matching in graphs , 1986, CSUR.

[8]  Tran Dinh Am,et al.  An approach to pin assignment in printed circuit board design , 1980, SIGD.

[9]  H. Kuhn The Hungarian method for the assignment problem , 1955 .

[10]  Yang Cai,et al.  Optimal channel pin assignment , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Patrick Groeneveld,et al.  Towards integration of quadratic placement and pin assignment , 2005, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05).

[12]  Atsushi Takahashi,et al.  A global routing method for 2-layer ball grid array packages , 2005, ISPD '05.

[13]  Sao-Jie Chen,et al.  Printed circuit board routing and package layout codesign , 2002, Asia-Pacific Conference on Circuits and Systems.

[14]  Harold N. Gabow,et al.  An Efficient Implementation of Edmonds' Algorithm for Maximum Matching on Graphs , 1976, JACM.

[15]  Shin'ichi Wakabayashi,et al.  An optimal channel pin assignment with multiple intervals for building block layout , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

[16]  Leah Mory-Rauch Pin Assignment on a Printed Circuit Board , 1978, 15th Design Automation Conference.

[17]  Harold W. Kuhn,et al.  The Hungarian method for the assignment problem , 1955, 50 Years of Integer Programming.