An Optimized Logarithmic Converter With Equal Distribution of Relative Errors
暂无分享,去创建一个
[1] Hoi-Jun Yoo,et al. Power and Area-Efficient Unified Computation of Vector and Elementary Functions for Handheld 3D Graphics Systems , 2008, IEEE Transactions on Computers.
[2] Sunil P. Khatri,et al. A Fast Hardware Approach for Approximate, Efficient Logarithm and Antilogarithm Computations , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[3] Hoi-Jun Yoo,et al. A Low-Power Unified Arithmetic Unit for Programmable Handheld 3-D Graphics Systems , 2007, IEEE J. Solid State Circuits.
[4] John N. Mitchell,et al. Computer Multiplication and Division Using Binary Logarithms , 1962, IRE Trans. Electron. Comput..
[5] Javier D. Bruguera,et al. High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation , 2005, J. VLSI Signal Process..
[6] Hoi-Jun Yoo,et al. A 231-MHz, 2.18-mW 32-bit Logarithmic Arithmetic Unit for Fixed-Point 3-D Graphics System , 2005, IEEE Journal of Solid-State Circuits.
[7] Javier Valls-Coquillat,et al. Low Cost Hardware Implementation of Logarithm Approximation , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[8] Davide De Caro,et al. Accurate Fixed-Point Logarithmic Converter , 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.
[9] Wan Wanggen,et al. Error flatten logarithm approximation for graphics processing unit , 2011, ICM 2011 Proceeding.
[10] Davide De Caro,et al. Efficient Logarithmic Converters for Digital Signal Processing Applications , 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.