Digital phase lock loop and its clock adjusting method

A digital phase-lock loop and clock adjusting method, the locking module is used to detect how many delay units are required by delaying input clock for N clock periods; calculating module which is used to calculate the number of delay unit needed by input clock based on the input of system;The clock adjusting module which adjusts the input clock based on the calculating result of the calculatingmodule; control module which is use to control the calculating module and clock adjusting module, the clock adjusting module includes the first delay chain and the second delay chain, the corresponding delay unit is selected based on the result of the calculating module, the clock adjusting module also includes switch control module which is used to choose one output of the first delay chain and the second delay chain as the output clock, the control module controls the first delay chain and the second delay chain based on the selection of the switch control module, and loads the calculation of the calculating module to unselected delay chain.