Design and architectures for dependable embedded systems
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Marco Platzner | Rüdiger Kapitza | Norbert Wehn | Mehdi Baradaran Tahoori | Jürgen Teich | Wolfgang Rosenstiel | Jörg Henkel | Lars Bauer | Rolf Ernst | Uwe Brinkschulte | Michael Engel | Ulf Schlichtmann | Oliver Bringmann | Joachim Becker | Olaf Spinczyk | Samarjit Chakraborty | Peter Marwedel | Andreas Herkersdorf | Hans-Joachim Wunderlich | Hermann Härtig | Lars Hedrich | Daniel Lohmann | J. Henkel | Hermann Härtig | Ulf Schlichtmann | R. Ernst | W. Rosenstiel | N. Wehn | M. Tahoori | H. Wunderlich | J. Teich | P. Marwedel | O. Bringmann | L. Hedrich | R. Kapitza | S. Chakraborty | M. Platzner | O. Spinczyk | D. Lohmann | A. Herkersdorf | U. Brinkschulte | M. Engel | L. Bauer | J. Becker
[1] Marco Platzner,et al. ReconOS: Multithreaded programming for reconfigurable computers , 2009, TECS.
[2] John W. Lockwood,et al. Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads , 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).
[3] Wolfgang Schröder-Preikschat,et al. Configurable memory protection by aspects , 2007, PLOS '07.
[4] Wolfgang Schröder-Preikschat,et al. CiAO: An Aspect-Oriented Operating-System Family for Resource-Constrained Embedded Systems , 2009, USENIX Annual Technical Conference.
[5] Jörg Henkel,et al. Agent-Based Thermal Management Using Real-Time I/O Communication Relocation for 3D Many-Cores , 2011, PATMOS.
[6] Alan L. Cox,et al. Concurrent Direct Network Access for Virtual Machine Monitors , 2007, 2007 IEEE 13th International Symposium on High Performance Computer Architecture.
[7] Babak Falsafi,et al. Fingerprinting: bounding soft-error-detection latency and bandwidth , 2004, IEEE Micro.
[8] Naresh R. Shanbhag,et al. Error-Resilient Low-Power Viterbi Decoder Architectures , 2009, IEEE Transactions on Signal Processing.
[9] James D. Meindl,et al. Solid-State Circuits Conference , 1969 .
[10] Robert S. Swarz,et al. Reliable Computer Systems: Design and Evaluation , 1992 .
[11] Muhammad Shafique,et al. Revc: Computationally Reliable Video Coding on unreliable hardware platforms: A case study on error-tolerant H.264/AVC CAVLC entropy coding , 2011, 2011 18th IEEE International Conference on Image Processing.
[12] Engin Ipek,et al. Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor , 2007, 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07).
[13] Michael Engel,et al. Improving transient memory fault resilience of an H.264 decoder , 2010, 2010 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia.
[14] Ulf Schlichtmann,et al. Program-aware circuit level timing analysis , 2011, 2011 International Symposium on Integrated Circuits.
[15] Subhasish Mitra,et al. Robust System Design to Overcome CMOS Reliability Challenges , 2011, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.
[16] Hamido Fujita,et al. Special issue on "techniques to produce Intelligent_Secure software" , 2007, Knowl. Based Syst..
[17] Rolf Ernst,et al. Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints , 2011, 2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
[18] Luca Benini,et al. Thermal Balancing Policy for Multiprocessor Stream Computing Platforms , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[19] Anand Raghunathan. Designing Chips without Guarantees , 2010, IEEE Design & Test of Computers.
[20] Melvin A. Breuer,et al. Multi-media applications and imprecise computation , 2005, 8th Euromicro Conference on Digital System Design (DSD'05).
[21] Oliver Bringmann,et al. ESL power analysis of embedded processors for temperature and reliability estimations , 2009, CODES+ISSS '09.
[22] Olaf Spinczyk,et al. The design and implementation of AspectC++ , 2007, Knowl. Based Syst..
[23] Kaushik Roy,et al. Scalable effort hardware design: Exploiting algorithmic resilience for energy efficiency , 2010, Design Automation Conference.
[24] Narayanan Vijaykrishnan,et al. Interconnect and thermal-aware floorplanning for 3D microprocessors , 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).
[25] Tommy Kuhn,et al. Runtime-datapath-remapping for fault-tolerant coarse-grained reconfigurable architectures , 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).
[26] Martin Lukasiewycz,et al. Towards scalable system-level reliability analysis , 2010, Design Automation Conference.
[27] Rüdiger Kapitza,et al. DanceOS : Towards Dependability Aspects in Configurable Embedded Operating Systems ? , 2010 .
[28] Tommy Kuhn,et al. Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures , 2011, 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems.
[29] Jun Yang,et al. Thermal-Aware Task Scheduling for 3D Multicore Processors , 2010, IEEE Transactions on Parallel and Distributed Systems.
[30] Subhasish Mitra,et al. Cross-layer resilience challenges: Metrics and optimization , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[31] Niraj K. Jha,et al. Fault-tolerant computer system design , 1996, IEEE Parallel & Distributed Technology: Systems & Applications.
[32] Martin Lukasiewycz,et al. Symbolic system level reliability analysis , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[33] Shekhar Y. Borkar,et al. Designing reliable systems from unreliable components: the challenges of transistor variability and degradation , 2005, IEEE Micro.
[34] Norbert Wehn,et al. A rapid prototyping system for error-resilient multi-processor systems-on-chip , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[35] P. K. Dubey,et al. Recognition, Mining and Synthesis Moves Comp uters to the Era of Tera , 2005 .
[36] J. von Neumann,et al. Probabilistic Logic and the Synthesis of Reliable Organisms from Unreliable Components , 1956 .
[37] Norbert Wehn,et al. A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder , 2008, 2008 Design, Automation and Test in Europe.
[38] Kaushik Roy,et al. Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator , 2009, ISLPED.
[39] Sandeep K. Shukla,et al. Nano, quantum and molecular computing: implications to high level design and validation , 2004 .
[40] Nikil D. Dutt,et al. Cross-layer co-exploration of exploiting error resilience for video over wireless applications , 2008, 2008 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia.
[41] G.E. Moore,et al. No exponential is forever: but "Forever" can be delayed! [semiconductor industry] , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..
[42] Muhammad Shafique,et al. Reliable software for unreliable hardware: Embedded code generation aiming at reliability , 2011, 2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
[43] Wayne Luk,et al. Dynamic voltage scaling for commercial FPGAs , 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..
[44] Krishna V. Palem,et al. Energy Aware Algorithm Design via Probabilistic Computing: From Algorithms and Models to Moore?s Law and Novel (Semiconductor) Devices , 2003, HiPC.
[45] Michael Engel,et al. Temporal properties of error handling for multimedia applications , 2011, 2011 14th ITG Conference on Electronic Media Technology.
[46] Jörg Henkel,et al. Economic learning for thermal-aware power budgeting in many-core architectures , 2011, 2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
[47] Krishna V. Palem,et al. Energy aware algorithm design via probabilistic computing: from algorithms and models to Moore's law and novel (semiconductor) devices , 2003, CASES '03.
[48] Michael Roitzsch,et al. Video quality and system resources: Scheduling two opponents , 2008, J. Vis. Commun. Image Represent..
[49] Rolf Ernst,et al. System level performance analysis - the SymTA/S approach , 2005 .
[50] Tajana Simunic,et al. Static and Dynamic Temperature-Aware Scheduling for Multiprocessor SoCs , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[51] Subhasish Mitra,et al. ERSA: Error Resilient System Architecture for probabilistic applications , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[52] Douglas L. Jones,et al. Stochastic computation , 2010, Design Automation Conference.
[53] Michael Engel,et al. Using Application Knowledge to Improve Embedded Systems Dependability ∗ , 2010 .