Level-specific lithography optimization for 1-Gb DRAM

A general level-specific lithography optimization methodology is applied to the critical levels of a 1-Gb DRAM design at 175- and 150-nm ground rules. This three-step methodology-ruling out inapplicable approaches by physical principles, selecting promising techniques by simulation, and determining actual process window by experimentation-is based on process latitude quantification using the total window metric. The optimal lithography strategy is pattern specific, depending on the illumination configuration, pattern shape and size, mask technology, mask tone, and photoresist characteristics. These large numbers of lithography possibilities are efficiently evaluated by an accurate photoresist development bias model. Resolution enhancement techniques such as phase-shifting masks, annular illumination and optical proximity correction are essential in enlarging the inadequate process latitude of conventional lithography.

[1]  H. Fukuda,et al.  Imaging Characteristics of Multi-Phase-Shifting and Halftone Phase-Shifting Masks , 1991 .

[2]  Lars W. Liebmann,et al.  Pattern-dependent correction of mask topography effects for alternating phase-shifting masks , 1995, Advanced Lithography.

[3]  Siegfried Selberherr,et al.  Rigorous three-dimensional photoresist exposure and development simulation over nonplanar topography , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Hisashi Watanabe,et al.  Effect of variable sigma aperture on lens distortion and its pattern size dependence , 1996, Advanced Lithography.

[5]  Alberto L. Sangiovanni-Vincentelli,et al.  Automatic generation of analytical models for interconnect capacitances , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Llanda M. Richardson,et al.  Modeling and extraction of interconnect capacitances for multilayer VLSI circuits , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  Timothy A. Brunner,et al.  Approximate models for resist processing effects , 1996, Advanced Lithography.

[8]  Marc D. Levenson,et al.  Extending the lifetime of optical lithography technologies with wavefront engineering , 1994 .

[9]  M. Levenson,et al.  Improving resolution in photolithography with a phase-shifting mask , 1982, IEEE Transactions on Electron Devices.

[10]  Takayasu Sakurai,et al.  Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs , 1993 .

[11]  P. Yang,et al.  Multilevel metal capacitance models for CAD design synthesis systems , 1992, IEEE Electron Device Letters.

[12]  Will Conley,et al.  Lithographic performance of an environmentally stable chemically amplified photoresist (ESCAP) , 1996, Advanced Lithography.

[13]  A. Neureuther,et al.  Mask topography effects in projection printing of phase-shifting masks , 1994 .

[14]  Christopher A. Spence,et al.  Process latitude and CD bias evaluation of attenuated PSM , 1997, Advanced Lithography.

[15]  T. Sakurai,et al.  Simple formulas for two- and three-dimensional capacitances , 1983, IEEE Transactions on Electron Devices.

[16]  Christophe Pierrat,et al.  Exposure characteristics of alternate aperture phase‐shifting masks fabricated using a subtractive process , 1992 .

[17]  Alek C. Chen,et al.  An evaluation of X-ray lithography using a 0.175 /spl mu/m (0.245 /spl mu/m/sup 2/ cell area) 1 Gb DRAM technology , 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

[18]  Will Conley,et al.  PHS with inert blocking groups for DUV negative resist , 1997, Advanced Lithography.

[19]  David M. Williamson,et al.  Micrascan III: 0.25-um resolution step-and-scan system , 1996, Advanced Lithography.

[20]  Burn Jeng Lin,et al.  THE ATTENUATED PHASE-SHIFTING MASK , 1992 .

[21]  Andrew R. Neureuther,et al.  Application of a general reaction/diffusion resist model to emerging materials with extension to nonactinic exposure , 1997, Advanced Lithography.

[22]  Chang-Ming Dai,et al.  Simulation and optimization of phase-shift masks for dense contact patterns with i-line illumination , 1997, Advanced Lithography.

[23]  Thomas,et al.  Deep-UV Lithographic Approaches For 1 Gb DRAM , 1997, 1997 Symposium on VLSI Technology.

[24]  Shinji Wakamoto,et al.  KrF step-and-scan exposure system using higher-NA projection lens , 1996, Advanced Lithography.

[25]  W. Harth,et al.  Low-frequency open-circuit noise voltage of GaAs pin-avalanche transit-time diodes , 1992 .

[26]  Lars W. Liebmann,et al.  Optimization of resolution-enhanced photolithography for a 256 Mb DRAM cell , 1994, Proceedings of 1994 VLSI Technology Symposium.

[27]  T. Hamamoto,et al.  Fully self-aligned 6F/sup 2/ cell technology for low cost 1Gb DRAM , 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

[28]  Richard A. Ferguson,et al.  Data analysis methods for evaluating lithographic performance , 1997 .

[29]  Soichi Inoue,et al.  A 0.15 /spl mu/m KrF lithography for 1 Gb DRAM product using highly printable patterns and thin resist process , 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

[30]  Emil Wolf,et al.  Principles of Optics: Contents , 1999 .

[31]  William N. Partlo,et al.  Depth of focus and resolution enhancement of i-line and deep-UV lithography using annular illumination , 1993, Advanced Lithography.

[32]  Keiichiro Tounai,et al.  Optimization of modified illumination for 0.25-um resist patterning , 1994, Advanced Lithography.

[33]  Takashi Yamada,et al.  NAND-Structured DRAM Cell with Lithography-Oriented Design (Special Issue on ULSI Memory Technology) , 1996 .

[34]  Timothy A. Brunner,et al.  Impact of lens aberrations on optical lithography , 1997, IBM J. Res. Dev..

[35]  S. Vaidya,et al.  Mask assisted off‐axis illumination technique for random logic , 1993 .

[36]  B.J. Lin.  Partially coherent imaging in two dimensions and the theoretical limits of projection printing in microfabrication , 1980, IEEE Transactions on Electron Devices.

[37]  Michael L. Rieger,et al.  Mask fabrication rules for proximity-corrected patterns , 1996, Photomask Technology.

[38]  Lars W. Liebmann,et al.  Lithographic effects of mask critical dimension error , 1998, Advanced Lithography.

[39]  Takeo Hashimoto,et al.  DOF enhancement of isolated line patterns by newly developed assistant pattern method , 1997, Advanced Lithography.

[40]  Richard C. Henderson,et al.  Advances in process matching for rules-based optical proximity correction , 1996, Photomask Technology.

[41]  David Levenson.  Wavefront engineering from 500- to 100-nm CD , 1997, Advanced Lithography.

[42]  Kevin J. Orvek,et al.  Characterization of positive DUV resists at 0.25-μm polygate using organic and inorganic antireflection schemes , 1997, Advanced Lithography.

[43]  Lars W. Liebmann,et al.  Optical proximity correction: a first look at manufacturability , 1994, Photomask Technology.

[44]  Takashi Sato,et al.  New phase shifting mask with self-aligned phase shifters for a quarter micron photolithography , 1989, International Technical Digest on Electron Devices Meeting.

[45]  Masaaki Tanaka,et al.  Photolithography System Using Modified Illumination , 1993 .

[46]  William H. Press,et al.  Numerical Recipes in C, 2nd Edition , 1992 .

[47]  Avideh Zakhor,et al.  Experimental results on optical proximity correction with variable-threshold resist model , 1997, Advanced Lithography.

[48]  Tsuneo Terasawa,et al.  0.3-micron Optical Lithography Using A Phase-Shifting Mask , 1989, Advanced Lithography.

[49]  Toshiro Tsumori,et al.  Effective light source optimization with the modified beam for depth-of-focus enhancements , 1994, Advanced Lithography.