Distributed Network of LDO Microregulators Providing Submicrosecond DVFS and IR Drop Compensation for a 24-Core Microprocessor in 14-nm SOI CMOS

A distributed network of low-dropout (LDO) microregulators (uREGs) senses and corrects the voltages at multiple points on a power supply grid in a multi-core microprocessor to reduce errors due to IR drops. A voltage regulator controller (VREGC) compares the voltages at various points on the grid to a programmable reference and delivers a set of corrective 2-b up/down (UP/DN) codes (global feedback) to the distributed uREGs across the core. Inside each uREG, the UP/DN codes control a local charge pump that sets the reference for an asynchronous comparator that turns on and off a pMOS passgate with a sub-nanosecond response. To mitigate the self-generated ripple, hybrid fast/slow passgate control is employed, whereby a parallel pMOS passgate with a slew-rate-limited gate drive is used to supply the dc portion of the load current. The distributed regulator architecture includes a scheme for limiting the degree of load-sharing imbalances among its uREGs due to the VREGC comparator offsets. Adding a switched-capacitor (SC) accelerator to the charge pump of each uREG speeds up the output-voltage transitions by up to 17 $\times $ for greater dynamic voltage and frequency scaling (DVFS) savings. Line and load regulations are 9 mV/V and 1.1 mV/A, respectively. The regulator achieves a peak power efficiency of 95.2% and a peak current efficiency of 99.1%. It reaches a peak power density of 82.3 W/mm2.

[1]  James Tschanz,et al.  8.5 A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode Operation , 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

[2]  Patrick P. Mercier,et al.  A Charge-Pump-based Digital LDO Employing an AC-Coupled High-Z Feedback Loop Towards a sub-4fs FoM and a 105,000x Stable Dynamic Current Range , 2019, 2019 IEEE Custom Integrated Circuits Conference (CICC).

[3]  Johann W. Kolar,et al.  A 10 W On-Chip Switched Capacitor Voltage Regulator With Feedforward Regulation Capability for Granular Microprocessor Power Delivery , 2017, IEEE Transactions on Power Electronics.

[4]  James Tschanz,et al.  14.7 A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation , 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

[5]  Xiaosen Liu,et al.  A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS , 2018, IEEE Journal of Solid-State Circuits.

[6]  Cheng Huang,et al.  20.5 A 2-/3-phase fully integrated switched-capacitor DC-DC converter in bulk CMOS for energy-efficient digital circuits with 14% efficiency improvement , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[7]  Rui Paulo Martins,et al.  20.4 An output-capacitor-free analog-assisted digital low-dropout regulator with tri-loop control , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[8]  John F. Bulzacchelli,et al.  Distributed Network of LDO Microregulators Providing Submicrosecond DVFS and IR Drop Compensation for a 24-Core Microprocessor in 14nm SOI CMOS , 2019, 2019 IEEE Custom Integrated Circuits Conference (CICC).

[9]  Kevin G. Stawiasz,et al.  5.2 Distributed system of digitally controlled microregulators enabling per-core DVFS for the POWER8TM microprocessor , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[10]  P. Casimiro,et al.  Embedded CMOS distributed voltage regulator for large core loads , 2003, ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).

[11]  Rajesh Kumar,et al.  Haswell: A Family of IA 22 nm Processors , 2015, IEEE Journal of Solid-State Circuits.

[12]  Seongwon Kim,et al.  Dual-Loop System of Distributed Microregulators With High DC Accuracy, Load Response Time Below 500 ps, and 85-mV Dropout Voltage , 2012, IEEE Journal of Solid-State Circuits.

[13]  Michiel Steyaert,et al.  10.1 A 1.1W/mm2-power-density 82%-efficiency fully integrated 3∶1 Switched-Capacitor DC-DC converter in baseline 28nm CMOS using Stage Outphasing and Multiphase Soft-Charging , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[14]  Jaydeep Kulkarni,et al.  A 0.45–1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS , 2014, IEEE Journal of Solid-State Circuits.

[15]  Patrick P. Mercier,et al.  8.2 A Continuous-Input-Current Passive-Stacked Third-Order Buck Converter Achieving 0.7W/mm2 Power Density and 94% Peak Efficiency , 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).