Stuck-At 0/1 Trojans on Return Address Stack

The detection of Hardware Trojan (HT) in large systems/circuits like chip multiprocessors (CMPs) turns out to be extremely difficult. The HT degrades integrity and confidentiality of secret data. The return-address stack (RAS), on the other hand, is a compact but significant component of a processor. It is to attain better accuracy in control-flow prediction. This work explores the effect of trojan attack on RAS. The implanted trojan forces a data path to stuck-at to a logical value. The effect of stuck-at logic 0 and 1 on cache system, registers and ALU activities are examined. It is observed that the stuck-at to logic 1 encounters huge additional cache accesses, misses and replacement of memory blocks. Further, the rise of ALU activities adds huge power requirement for the system.

[1]  M. Nirmala Devi,et al.  Hardware Trojan Detection Using Effective Test Patterns and Selective Segmentation , 2017, SSCC.

[2]  Shivam Bhasin,et al.  A survey on hardware trojan detection techniques , 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

[3]  Margaret Martonosi,et al.  Wattch: a framework for architectural-level power analysis and optimizations , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).

[4]  Rajat Subhra Chakraborty,et al.  Hardware Trojan Insertion by Direct Modification of FPGA Configuration Bitstream , 2013, IEEE Design & Test.

[5]  Giorgio Di Natale,et al.  A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans , 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).

[6]  Michael S. Hsiao,et al.  Hardware Trojan Attacks: Threat Analysis and Countermeasures , 2014, Proceedings of the IEEE.

[7]  Michael S. Hsiao,et al.  A region based approach for the identification of hardware Trojans , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

[8]  Michael S. Hsiao,et al.  A Novel Sustained Vector Technique for the Detection of Hardware Trojans , 2009, 2009 22nd International Conference on VLSI Design.

[9]  Devu Manikantan Shila,et al.  Design, implementation and security analysis of Hardware Trojan Threats in FPGA , 2014, 2014 IEEE International Conference on Communications (ICC).

[10]  Subhasish Mitra,et al.  The Trojan-proof chip , 2015, IEEE Spectrum.