Upcoming wireless communication networks are expected to support the wide variety of services ranging from low data rate applications such as wireless sensor networks to high data rate delay sensitive multimedia services. To bring such networks to life, wireless transceivers should evolve from existing homogeneous to heterogeneous architectures capable of adapting their transmission parameters on-the-fly to meet the desired quality of service. For such heterogeneous transceivers, the design and analysis of various waveforms such as Orthogonal Frequency Division Multiplexing (OFDM) and its variants such as windowed overlap and add OFDM (WOLA-OFDM) and filtered OFDM (F-OFDM), filter bank multi carrier (FBMC) etc., is one of the popular and important research area today. From transceiver implementation perspective, Zynq System on Chip (ZSoC) from Xilinx provides an efficient solution for implementation of heterogeneous reconfigurable systems and is superior to conventional two chip solutions. ZSoC is an integrated system consisting of an ARM processor which comprises the processing system (PS) and a reconfigurable field programmable gate array (FPGA) forming the programming logic (PL) of the architecture. The design and implementation of 802.11a based transceiver using various waveforms on the ZSoC platform along with the detailed performance and complexity analysis are the main focus of the work presented in this thesis. The first contribution of this thesis is the design of the 802.11a based transceiver architecture using OFDM waveform. The architecture is then divided into two sections, one for PL and other for PS. Such co-design approach gives the flexibility to choose which part of the system to realize in PL and which in PS. Different configurations of the architecture are analyzed to identify the units best suited to be implemented respectively on PS and PL. The second contribution is to replace OFDM based transceiver with WOLA-OFDM and FOFDM waveforms. In WOLA-OFDM, some portion of the symbol is appended at the start and end overlapping with adjacent symbols. In addition, time domain windowing is applied via root raised cosine filtering. In F-OFDM, a linear phase finite impulse response filter is used to further improve the out-of-band attenuation of the OFDM. Next, the functionality of these architectures with different configurations of PS and PL is verified by implementing them on ZSoC platform using hardware software co-design workflow of MATLAB and Simulink. Based on out-of-band attenuation plots for different bandwidths, it is observed that WOLA-OFDM and F-OFDM offer better performance than OFDM for any given bit-to-error ratio. Among them, F-OFDM offers significantly better out-of-band attenuation than WOLA-OFDM. Implementation complexity comparison shows that F-OFDM complexity is slightly higher than others. However, in all the configurations, the utilization of the number of flip-flops and look-up-tables of PL section is less than 7% and 35% respectively leaving enough resources for higher layers.
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