Divider Circuit Verification with Model Checking and Theorem Proving

Most industrial-size hardware verification problems are amenable to neither fully automated nor fully manual hardware verification methods. However, combinations of these two extremes, human-constructed proofs with automatically verified lower-level steps, seem to offer great promise. In this paper we discuss a formal verification case study based on such a combination of theorem-proving and model-checking techniques. The case study addresses the correctness of a floating-point divider unit of an Intel IA-32 microprocessor. The verification was carried out in the Forte framework, which consists of a general-purpose theorem-prover, ThmTac, on top of a symbolic trajectory evaluation based model-checking engine. The correctness of the circuit was formulated and decomposed to smaller, automatically model-checkable, statements in a pre/postcondition framework. The other key steps of the proof involved relating bit vectors to integer arithmetic and general arithmetic reasoning.