Chaotic binary bat algorithm for analog test point selection

A set of novel methods are proposed to optimize analog test point selection in this paper. We have introduced chaos and elitist strategy into the binary bat algorithm so as to increase its global search mobility and effectiveness for robust global optimization. In the present study, nine well known chaotic maps are introduced and used to construct the chaotic binary bat algorithm (CBBA) respectively. As a result, we have developed nine different CBBAs and for the first time applied them to deal with the analog test point selection problem. The attractiveness of our proposed CBBA mainly lies in two aspects: the utilization of chaotic maps to tune the BBA parameter and the application of elitist strategy to store all the possible global best solutions. These improvements obviously enhance the performance of BBA and make our new algorithms (CBBAs) get all the best solutions (usually more than one) easily and effectively, which will give us more possible choices in practice. Analog circuits’ examples and a group of statistical experiments are given to demonstrate the feasibility and effectiveness of the proposed algorithms. The other reported algorithms are also used to do the comparison. The results indicate that the proposed algorithms have excellent performance in finding the optimum test point sets. Therefore, they are good solutions and applicable to actual circuits and engineering practice.

[1]  Shulin Tian,et al.  Application of Heuristic Graph Search to Test-Point Selection for Analog Fault Dictionary Techniques , 2009, IEEE Transactions on Instrumentation and Measurement.

[2]  Fahime Moein-darbari,et al.  Scheduling of scientific workflows using a chaos-genetic algorithm , 2010, ICCS.

[3]  R. Devaney An Introduction to Chaotic Dynamical Systems , 1990 .

[4]  P. M. Lin,et al.  Analogue circuits fault dictionary. New approaches and implementation , 1985 .

[5]  W. Hochwald,et al.  A dc approach for analog fault dictionary determination , 1979 .

[6]  Germán Terrazas,et al.  Nature Inspired Cooperative Strategies for Optimization, NICSO 2010, May 12-14, 2010, Granada, Spain , 2012, NISCO.

[7]  Xin-She Yang,et al.  A New Metaheuristic Bat-Inspired Algorithm , 2010, NICSO.

[8]  Tom A. M. Kevenaar,et al.  Iterative test-point selection for analog circuits , 1996, Proceedings of 14th VLSI Test Symposium.

[9]  V. C. Prasad,et al.  Selection of test nodes for analog fault diagnosis in dictionary approach , 2000, IEEE Trans. Instrum. Meas..

[10]  Di Xiao,et al.  A novel Hash algorithm construction based on chaotic neural network , 2011, Neural Computing and Applications.

[11]  Leandro dos Santos Coelho,et al.  Use of chaotic sequences in a biologically inspired algorithm for engineering design optimization , 2008, Expert Syst. Appl..

[12]  Pierre Duhamel,et al.  Automatic test generation techniques for analog circuits and systems: A review , 1979 .

[13]  J. Hywel Williams,et al.  Computer aided feature selection for enhanced analogue system fault location , 1978, Pattern Recognit..

[14]  Xin-She Yang,et al.  Bat algorithm: a novel approach for global engineering optimization , 2012, 1211.6663.

[15]  Xin-She Yang,et al.  Chaos-enhanced accelerated particle swarm optimization , 2013, Commun. Nonlinear Sci. Numer. Simul..

[16]  Shulin Tian,et al.  Multidimensional Fitness Function DPSO Algorithm for Analog Test Point Selection , 2010, IEEE Transactions on Instrumentation and Measurement.

[17]  Hartmut Jürgens,et al.  Chaos and Fractals: New Frontiers of Science , 1992 .

[18]  Mohammad Saleh Tavazoei,et al.  Comparison of different one-dimensional maps as chaotic search pattern in chaos optimization algorithms , 2007, Appl. Math. Comput..

[19]  Xin-She Yang,et al.  Binary bat algorithm , 2013, Neural Computing and Applications.

[20]  E. Ott Chaos in Dynamical Systems: Contents , 2002 .

[21]  Yuanyuan Jiang,et al.  A New Optimal Test Node Selection Method for Analog Circuit , 2012, J. Electron. Test..

[22]  Dong Liu,et al.  Entropy-based optimum test points selection for analog fault dictionary techniques , 2004, IEEE Transactions on Instrumentation and Measurement.

[23]  Jerzy Rutkowski,et al.  Genetic-Algorithm-Based Method for Optimal Analog Test Points Selection , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[24]  Robert M. May,et al.  Simple mathematical models with very complicated dynamics , 1976, Nature.

[25]  E. Ott Chaos in Dynamical Systems: Contents , 1993 .

[26]  Xin-She Yang,et al.  BBA: A Binary Bat Algorithm for Feature Selection , 2012, 2012 25th SIBGRAPI Conference on Graphics, Patterns and Images.

[27]  Andrew Lewis,et al.  Biogeography-based optimisation with chaos , 2014, Neural Computing and Applications.

[28]  Bruce C. Kim,et al.  An approach for selection of test points for analog fault diagnosis , 2003, Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI Systems.

[29]  B. Alatas,et al.  Chaos embedded particle swarm optimization algorithms , 2009 .

[30]  J.W. Bandler,et al.  Fault diagnosis of analog circuits , 1985, Proceedings of the IEEE.

[31]  Robert C. Hilborn,et al.  Chaos And Nonlinear Dynamics: An Introduction for Scientists and Engineers , 1994 .