An efficient adder/subtracter circuit for one-hot residue number system

Residue number system (RNS) is an appropriate system for fast and parallel arithmetic operation. This speed increases if one-hot residue (OHR) number system is used. There are problems in OHR with area and hardware consumption, when modules are large or result of various arithmetic operations is needed. In this paper, a new design for concurrent add and subtract operation in OHR systems, using barrel shifter structure is proposed. This design is extended to include the even and odd modules of a RNS system. For add/subtract operation in this paper, Presented design generates the addition and subtraction of two parameters synchronously in a one-hot circuit which its hardware is in the order of (m+1)2, compare to original 2m.2 it means that the amount of hardware in the proposed circuit is half of conventional structure that used two barrel shifters.

[1]  Laurent Imbert,et al.  a full RNS implementation of RSA , 2004, IEEE Transactions on Computers.

[2]  L. Imbert,et al.  BRIEF CONTRIBUTIONS: A FULL IMPLEMENTATION RSA IN RNS , 2004 .

[3]  Jr. W.A. Chren,et al.  One-hot residue coding for low delay-power product CMOS design , 1998 .

[4]  Alexander Skavantzos,et al.  On MultiModuli residue number systems with moduli of forms r/sup a/, r/sup b/-1, r/sup c/+1 , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[5]  B. Parhami RNS representations with redundant residues , 2001, Conference Record of Thirty-Fifth Asilomar Conference on Signals, Systems and Computers (Cat.No.01CH37256).

[6]  H. Garner The residue number system , 1959, IRE-AIEE-ACM '59 (Western).

[7]  Keivan Navi,et al.  Arithmetic Circuits of Redundant SUT-RNS , 2009, IEEE Transactions on Instrumentation and Measurement.